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THE ETHERNET DEVELOPMENT BOARD

Part 2: The Software and Firmware Exposed
by Fred Eady

Start ý The Basics ý Registers ý Bus Interface Registers ý Status and Control Registers ý InitChip ý Initiate Transmit Registers ý Address Filter Registers ý Receive and Transmit Frame Locations ý CS8900A-CQ Transmit and Receive Operations ý The Next Read ý Broadcast ý ARP ý No Cheating ý Tiger Woodsý Putter ý Whatýs the Point? ý And It Programs, Too! ý Sources and PDF

CS8900A-CQ TRANSMIT AND RECEIVE OPERATIONS

Take a look at Listing 10 before you read on. Listing 10 is a list of the PIC port and pin definitions. Port B of the PIC16F877 is used for both the programming of the part and CS8900A-CQ I/O control. The data bus is synthesized on Port C, and a psuedo-4-bit address bus takes up residence in the lower half of Port D. The first 48 bytes of PIC RAM are the usual counters, flags, pointers, and scratch registers that make up most PIC applications. The actual frame data buffer area begins at the PICýs register address 0x32.

Listing 11 consists of a tight loop that is polling the CS8900A-CQ INTRQ0 line followed by code to determine if an ARP request has been received. ServiceISQ dispatches routines based on the protocol contents of their frames.

To receive a frame, the CS8900A-CQ must accept it using the IA register and destination address filter. After the packet is accepted, the preamble and start-of-frame delimiter are ignored and the bits following the SFD are loaded into the CS8900A-CQ receive buffer area. To refresh your understanding of packets versus frames, Iýve included Figure 1 for your viewing pleasure. RXCFG_RX_OK_IE (0x0100) is loaded into the RxCFG register, and the BufferCRC bit (0x0800) is clear. This means you do not include the CRC in the receive buffer contents or the length calculations.

Figure 1ýEverything inside the frame area is supplied by you with the exception of the padding and CRC.

Beginning at the top of Listing 12, after the PIC16F877ýs Port C is put into input mode, the receive status is read high-order byte first. Notice that the receive status is not stored for later use. Even so, it still must be read. If youýre interested in the receive status, it can be determined by reading the RxEvent register. This is a required read no matter what you do with the data.

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