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THE ETHERNET DEVELOPMENT BOARD

Part 2: The Software and Firmware Exposed
by Fred Eady

Start ý The Basics ý Registers ý Bus Interface Registers ý Status and Control Registers ý InitChip ý Initiate Transmit Registers ý Address Filter Registers ý Receive and Transmit Frame Locations ý CS8900A-CQ Transmit and Receive Operations ý The Next Read ý Broadcast ý ARP ý No Cheating ý Tiger Woodsý Putter ý Whatýs the Point? ý And It Programs, Too! ý Sources and PDF

STATUS AND CONTROL REGISTERS

These registers are subdivided into two groupsýconfiguration and control registers and status and event registers. Configuration and control registers determine how frames are transmitted and received. In addition, configuration and control registers determine which frames will be sent and received and which events will cause an interrupt to be sent to the PIC16F877.

The Ethernet development board uses many of the configuration and control registers early in the code to set up various areas that deal with receive and transmit functions. For instance, in Listing 6 the InitChip routine uses definitions from the ppageRxCFG and ppageTxCFG to generate an interrupt when:

If you take apart the control register (ppageRxCTL), you find that:

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