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THE ETHERNET DEVELOPMENT BOARD

Part 2: The Software and Firmware Exposed
by Fred Eady

Start ý The Basics ý Registers ý Bus Interface Registers ý Status and Control Registers ý InitChip ý Initiate Transmit Registers ý Address Filter Registers ý Receive and Transmit Frame Locations ý CS8900A-CQ Transmit and Receive Operations ý The Next Read ý Broadcast ý ARP ý No Cheating ý Tiger Woodsý Putter ý Whatýs the Point? ý And It Programs, Too! ý Sources and PDF

ADDRESS FILTER REGISTERS

The CS8900A-CQ comes equipped with a destination address register (DA). This address filter determines which frames will pass the CS8900A-CQ receive portal and be placed in the CS8900A-CQ receive buffer. If you recall from recent articles Iýve written in Circuit Cellar on the destination address, the first bit of the physical address should be zero. The reason for this is that if the first bit is not a zero, the address is not a physical address. The IA on the incoming frame must match the physical address in the CS8900A-CQ IA register (see Listing 2).

If the first bit of the incoming DA is a 1, then the frame is a multicast frame, and the address is logical not physical. The CS8900A-CQ uses a hash technique to determine if it should accept the incoming multicast frame. Take a look at Listing 6 under PacketPage receiver control register bit definitions, and you will find that the multicast (RXCTL_MCAST_A) bit is not set. Thus, your implementation of the Ethernet development board will ignore multicast addresses.

Another look at Listing 6 indicates that, in addition to physical addresses, the Ethernet development board CS8900A-CQ also accepts broadcast addresses. Unless you know every physical and IP address of every host you want to communicate with and all of those remote hosts know your IP and MAC addresses (highly unlikely), you had better be able to resolve a broadcast message.

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