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THE ETHERNET DEVELOPMENT BOARD

Part 2: The Software and Firmware Exposed
by Fred Eady

Start ý The Basics ý Registers ý Bus Interface Registers ý Status and Control Registers ý InitChip ý Initiate Transmit Registers ý Address Filter Registers ý Receive and Transmit Frame Locations ý CS8900A-CQ Transmit and Receive Operations ý The Next Read ý Broadcast ý ARP ý No Cheating ý Tiger Woodsý Putter ý Whatýs the Point? ý And It Programs, Too! ý Sources and PDF

RECEIVE AND TRANSMIT FRAME LOCATIONS

These areas are used to transfer Ethernet frames between the CS8900A-CQ and PIC16F877. Only one receive and transmit frame is available to the PIC16F877 at any time, and the space for each frame is dynamically allocated by the CS8900A-CQ. Of course, all of the data is transferred between the PICýs RAM and the CS8900A-CQýs 4K buffer area via the PacketPage I/O ports.

That about covers what will concern you with the CS8900A-CQ register set. As you can see, there are a multitude of variables and configurations that can be had by setting and clearing the right set of bits. If Iýve left anything out, it will surface as I walk you through receiving and transmitting frames with the CS8900A-CQ.

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