Manufacturing Testing

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	MANUFACTURING TESTING
by George Martin Start ı The Problem ı A Possible Solution ı Test Setup ı POP Quiz ı Final Exam ı Sources and PDF TEST SETUP So, what would various tests look like? I would first divide the tests into two parts. One would be a functional test and the other would be assistance for troubleshooting. The functional test would be just thatıa test that guarantees 100% functionality of the device being tested. The other test would exercise the various signals and pins associated with the interface to the device. A technician could then attach test equipment and look for defective signals. The first type of device is a memory device. The traditional device test that I execute is the following: ı Write all zeros, then read all zeros. ı Write all ones, then read all ones. ı Write a unique value into each location, then read that unique value. ı Fill the memory with a pattern of AAA. Then, for each location, read and check the AAAs, and shift the pattern right one time. Write the pattern and read the pattern. Keep repeating this shifting, writing, and reading till you have written and read zeros. Then move on to the next location looking for the original AAA pattern. This is a brute force test. Youıre looking for data stuck at 0 and 1, all unique locations (no address lines shorted), and then for pattern sensitivity. Believe it or not, youıll find a few devices that fail these tests. Not many, but one is enough. This test was developed for 4- or 8-KB SRAM devices. But, what if the memory gets big? How long will these tests take to run? I contend that if itıs a well-documented test procedure that a technician can run, time doesnıt matter. If itıs going to take too long, look at dedicated test fixtures instead of reducing these patterns. What if Iıve got 8 MB (or more) of DRAM that Iım attempting to test? That type of testing could take a long time. I would still say, so what. Any lesser a test is just more of a guess as to whether or not youıve got a good memory. Obviously some sort of progress output as the tests are running would be a great help. But, adding that output (via a serial port perhaps) will require a call to a subroutine. That calling routine needs a functioning stack (an area in memory to save the address of the calling routine and area for passing parameters). Keep this in mind when mapping out your various memory areas. You canıt have valid stack operation in defective memory. Iıve seen procedures written up for testing DRAM in PCs. Perhaps some of these tests could be modified as your embedded DRAM gets larger. The exercise test for assisting a technician in troubleshooting would probably shift a single one through each of the data bits, writing then reading that data. Then, write and read all zeros and ones but this time shift a one bit through all of the address lines. This is straightforward for SRAM because all of the address and data lines are non-multiplexed. But, this probably isnıt the best for DRAM. PREVIOUS • NEXT Circuit Cellar provides up-to-date information for engineers. Visit www.circuitcellar.com for more information and additional articles. For subscription information, call (860) 875-2199, subscribe@circuitcellar.com or subscribe online. ıCircuit Cellar, the Magazine for Computer Applications. Posted with permission.