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HELPING THE ENVIRONMENT:

EMBEDDED SOFTWARE DEVELOPMENT
by Daniel Mann

Start ý Host-to-Target Connection ý Bringing Down Tool Costs ý Hardware Connection ý Supported Functions ý Trace Cache Data Compression ý Future Tool Methodologies ý Sources and PDF

The software used to support embedded microprocessor-based products has grown so complex that it almost rivals the complexity of desktop software. However, the productivity of tools used to develop embedded software has lagged behind their desktop counterparts.

Within the embedded industry, in-circuit emulators (ICEs) are widely used for software development. ICEs are effective tools, but rising processor complexity has reduced or delayed their availability and is also pushing to raise their cost. Additionally, ICEs have not provided the embedded-software industry with a universally accepted software-development environment to rival the PC desktop environment.

To address this issue, processor manufacturers are moving to include on-chip support for software development. This article reviews traditional methods and introduces AMDýs software development port.

TRADITIONAL EMBEDDED TOOLS

Traditionally, the most powerful piece of debug equipment available to an embedded project has been the ICE. They are most frequently (but not exclusively) used during the early stages of bringing up the hardware. In most cases, they are too expensive to be widely available to all project members. Unfortunately, rising processor complexity, higher clock speeds, use of on-chip cache, and packaging problems have reduced the availability of ICEs.

Although AMDebug technology supports an on-chip trace capability (more on that later), an alternative solution to supporting some kind of on-chip trace buffering scheme is to support a trace port. A port offers a standard interface for external trace capture hardware and should simplify the design and cost of ICE equipment. In my opinion, program trace data is best captured on-chip and not unreliably or intrusively extracted via expensive trace-pins, which have inadequate bandwidth. An on-chip trace cache also offers a trace capability at a much lower tool-up cost.

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