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REPLACING 8051 RAM

WITH DALLAS TIMEKEEPING RAM
by Bruce Renyolds

Start ý Clock Operation ý Donýt Need 32 KB? ý Replacing EPROMs ý Sources and PDF

Design engineers are often faced with the challenge of designing at optimum efficiency and minimal cost. Sometimes they have to simply modify an existing system to expand its capabilities. Applications requiring extensive memory read and write cycles quickly rule out the possibility of using EEPROM. Other design considerations such as environmental conditions or the need for frequent replacement of batteries may rule out an external battery backup for SRAM as well.

In an attempt to provide the industry with a nonvolatile RAM solution, Dallas Semiconductor combined an intelligent CMOS control circuit, a lithium energy source, and a low-power SRAM in an encapsulated package to offer a high-density nonvolatile memory device with timekeeping and power-fail write protection.

I like using the DS1644 in 8051 applications requiring nonvolatile external memory with timekeeping abilities. Packaged in a 28-pin encapsulated DIP, or DS1644P 34-pin low profile powercap module board, this memory device packs a lot of bang for the buck.

A LOOK INSIDE

The DS1644 is a drop-in replacement for standard JEDEC 32K ý 8 SRAM but with a few extra goodies. It contains an integrated nonvolatile SRAM, real-time clock, crystal (for the internal clock), power-fail detection circuit, and lithium energy source all in the DIP package. It can also double as a replacement for ROM, EPROM, and EEPROM as you can see in Figure 1.

Figure 1ýInside the encapsulated package you can see the internal setup that makes the DS1644 such a workhorse. Notice the lithium energy cell, power monitoring circuit, clock/RAM registers, and the clock/oscillator setup.

The internal power circuit is designed to detect low supply voltage, which Dallas refers to as Vpf or power-fail point. When V_cc falls below 4.5 (maximum) or 4.0 V (minimum), the internal power circuit write protects or blocks access to the internal clock registers and RAM while keeping the internal clock oscillator running.

As long as V_cc remains above 4.5 V, the internal RAM is accessed just like standard SRAM. Read and write access to the clock registers is gained using the control register located at 7FF8H. Figure 2 shows the internal clock register structure and control register.

Figure 2ýBits indicated by an X serve no function and may be used as normal RAM. The clock register data is stored in BCD format and the control register is used to gain access to the clock registers. Occupying only 8 bytes of upper RAM space leaves plenty of room for data storage.

The DS1644 is shipped with the internal clock oscillator turned off so the expected life begins when the clock oscillator is first turned on.

According to Dallas, in the absence of V_cc, the internal battery lasts for ten years with the internal clock oscillator running. With V_cc present, the internal power source should last considerably longer because no internal energy is consumed in the presence of V_cc above the Vpf or V_cc greater than 4.5 V.

NEXT

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