Xpedion Design Systems and Cadence Design Systems have team to integrate the Xpedion GoldenGate family of radio frequency simulation and modeling products with the Cadence Signal Processing Worksystem (SPW) and Cadence Analog Design Environment. The new product integration provides the designers of 3G, Bluetooth and RF integrated circuits (RF IC) with a unified bottom-up and top-down design methodology.

Xpedion's GoldenGate/Neural Network Model Compiler (NN-Model Compiler) accepts input data from the Analog Design Environment or from lab-measured data, and generates fully parametric SPW simulation models automatically. This gives users a way of developing models in a bottom-up design flow. The integration of GoldenGate/Sim within the Analog Design Environment provides users with multi-tone and complex 3G modulation analysis capability to check those models in a top-down flow.

Combining GoldenGate with SPW empowers designers to make design trade-offs at both the circuit and system level, throughout the wireless communication system development cycle. From the bottom-up flow, the RF design team can simulate at the circuit level with GoldenGate/Sim, using modulated signal data from SPW running system-level streams. For a top-down flow, the system-level architects performing SPW simulation can directly import the RF blocks in C-language form generated by the Xpedion GoldenGate NN-Model Compiler. The interface also supports the ability to drive Xpedion's model compiler with direct simulation results from Cadence's Spectre circuit simulator.

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