|
Houston
(October 15, 2001) - Texas Instruments Incorporated announced
today a software library of 21 imaging functions that allow
designers to rapidly develop power-efficient, digital
imaging applications utilizing video hardware extensions
designed within the TMS320C5510 and TMS320C5509 DSPs.
A single 200 MHz C5510 DSP, available today, can easily
perform MPEG4 video encoding and decoding at 30 frames
per second in quarter common intermediate format (QCIF)
resolution, while consuming only 50 milliwatts of power
for applications such as PDAs, digital camcorders,
Internet-enabled set-top boxes and other digital imaging
and video appliances.
The new
software library developed by Texas Instruments includes
C-callable functions (ANSI-C language compatible) to
utilize the hardware extensions for core components of
MPEG-4, JPEG and MJPEG processing such as discrete cosine
transform, motion estimation, pixel interpolation and a
library of video operations such as 1-D/2-D pyramid
wavelet decomposition and reconstruction. These components
are suitable for inclusion in creating eXpressDSP-compliant
algorithms, which will shorten development time in designing
high-performance video encode and decode into portable
applications. The software library and complete documentation
are free and downloadable from the web today.
The TMS320C55x
DSP core was created with an open architecture that allows
the addition of application-specific hardware to boost
performance on specific algorithms. The hardware extensions
on the C5510 and C5509 DSPs strike the perfect balance of
fixed function performance with programmable flexibility,
while achieving low-power consumption, and cost that
traditionally has been difficult to find in the video-processor
market.
The extensions
allow the C5510 and C5509 DSPs to deliver exceptional video
codec performance with more than half its bandwidth available
for performing additional functions such as color space
conversion, user interface operations, security, TCP/IP,
voice recognition, and text-to-speech conversion. As a result,
a single C5510 or C5509 DSP can power most portable digital
video applications with processing headroom to spare.
"Traditional
programmable solutions like RISC processors provide more
than enough flexibility, but lack the performance to do
more than the task at hand," said Marc Guillaumet, product
manager, A.T.E.M.E. "On the other end of the spectrum, an
ASIC solution provides all of the performance defined for
the application, but lacks flexibility. Other DSPs take the
approach of using general purpose processing units such as
arithmetic logic unit's (ALU) that require special multiple
issue instructions and add complexity for the programmer.
TI's approach is the best solution in regards to performance
and ease of use."
Unlike
accelerator units that are attached to a DSP core as a
peripheral, the C55x DSP is designed so that hardware
extensions can be integrated within the core's resources
thus allowing them to become part of the core signal flow.
An external accelerator requires hardware to be duplicated
that already exists in the DSP core and communication
overhead to handle the data transferred from the core
accelerator. Both requirements can increase latency,
degrade chip resource utilization, and increase programming
complexity. The C55x DSP core has none of these drawbacks,
stripping away roadblocks to optimum circuit design with
exceptional imaging and video performance.
"The C5510
and C5509 DSPs incorporates hardware video extensions
allowing designers to add imaging and video capabilities
to their portable applications," said Christine Wu, TI
C55x DSP product marketing manager. "They have been carefully
tailored for the C55x DSP generation since we began
development of the core. TI will continue developing
extensions for other applications in the future."
For portable
video and imaging applications that require higher resolution
image and video processing, TI offers the TMS320C5000 DSP
based TMS320DSC24 DSP solution. This system-on-a-chip
packs the processing power needed to deliver encoding or
decoding of real-time video in applications such as streaming
video. The DSC24 combines on a single device the ultra-low
power TMS320C5000 DSP to perform real-time media processing
and an ARM7TDMI RISC processor for system control
functions.
For high-performance
video client and infrastructure solutions, the TI TMS320C6000
DSP platform, the industry's highest-performance and most
flexible fully software programmable DSPs, includes
special-purpose instructions tailored for video and
imaging applications. It's flexible on-chip memory scheme
and high-bandwidth I/O capability are designed to handle
dense data streams that are characteristic of high-performance
video and imaging applications including video head-end
infrastructure equipment, wireless video gateways, digital
media centers, streaming media servers and IP-based video
phones & other surveillance/netcam type applications.
Proven Development Tools Improve Design Success
The C55x
DSP generation is supported by the most complete,
field-proven development platform in the industry -
eXpressDSP real-time software technology. This easy-to-use
suite of tools features the Code Composer Studio Integrated
Development Environment; the DSP/BIOS real-time kernel and
a large and growing range of application software compliant
to the TMS320 DSP Algorithm Standard from TI's nearly
500-member third-party network.
Designed for the Power-Efficient Needs of Portable Applications
The C5510
and C5509 DSPs combine up to 400 MIPS of processing speed
with the industry's lowest power of 0.25 mW/MIPS. The devices
provide a seamless, code-compatible migration path from
TI's programmable TMS320C54x DSP generation - the world's
most popular DSP. TI's C55x DSP generation incorporates
functions that would otherwise need to be enabled by external
devices, thus reducing board space, parts count and overall
product cost. This integration combined with the inherent
power efficiency of the C55x DSP generation improves battery
life up to 70 percent and allows the end product to offer
more features in a smaller footprint.
Availability
Samples
of the TMS320C5509 DSP at 144 MHz and the TMS320C5510 at
200 MHz are available today. Full production is scheduled
to begin in the first half of 2002 at a planned price of
$18 for the C5509 and $35 for the C5510 in 10,000 unit
quantities. The C5509 and C5510 DSP evaluation modules
(EVM) are available today for a special introductory price
of $995. Complete documentation and technical training are
available for free.
|
When TI
introduced the TMS320C5509 and 5510 last spring, they
didn't tell the whole story. They didn't disclose some
features of the underlying device architecture, primarily
because they didn't yet offer software to take advantage
of those features. With this announcement, they have the
software and are now starting to reveal details about
these hardware features. Indeed, while the press release
emphasizes the libraries, which are available at no charge,
the story really revolves around the underlying hardware
that TI is starting to talk about.
The applications
they're addressing with these developments involve digital
imaging using the latest compression algorithms. Certainly,
designers can add an accelerator chip to a system to assist
with these tasks, but that approach has several drawbacks.
Among them are the fact that the two chips must duplicate
some functions such as program sequencers and program address
units. You'll also pay a penalty in communications overhead,
adding to latency times and increasing program complexity.
Then, of course, you're paying for two chips and must also
supply the extra real estate and power.
Why not include
these accelerator functions directly in the base DSP? That's
what TI has done with the 55x, plus the 5509 and 5510 feature
three "bolt-on" hardware extension engines that perform a DCT,
motion estimation and pixel interpolation. Indeed, the 55x
architecture supports eight such bolt-on engines, says Dennis
Barrett, C5000 product marketing manager. He also explains
that the engines are gated and don't draw power unless
activated. Further, they don't take much die area because
each of the three engines he is talking about now require in the order
of 50,000 gates.
Note that you
won't find these "bolt-ons" on every 55x series device; TI
plans to add them only when it makes sense, in this case for
embedded video applications. For instance, the firm has
announced (but is not yet delivering) the 5502, which has
limited internal memory and thus requires external memory
for many applications. This situation means the device isn't
well suited for handheld battery operated systems, a prime
target for this new imaging technology now being announced.
Also, while the firm has announced OMAP class products based
on the C55 core in the wireless space, those devices won't
have these add-ons, either. However, you can expect to see
later OMAP devices and other future products based on the C55
core that have the ability to use these extensions as well as other
extensions that might come along.
But isn't today's
announcement really about software and a free library? Indeed,
and TI is now making available a library of 21 imaging
functions, functions required to implement popular imaging
standards. As you might imagine, most of them not only take
advantage but indeed require the C55 hardware extensions
(although the same functions are available for other processors
in code that doesn't require them). The library functions are
delivered as a mix of source code and object code. For
instance, some of the more basic functions such as a 1D or 2D
pyramid decomposition and reconstruction are all in source
code, while some higher level functions such as the DTC come
all as object code. TI's Barrett acknowledges that some
engineers want to examine the details of algorithms and says
the delivery situation could change in the future. He also
points out that for key customers TI can work out a separate
agreement with regard to supplying source code.
Also note that
TI previously made the details of these library functions
available to third-party software suppliers such as Ingenient
Technologies, ATEME, Power Image and ubvideo, so users can
already purchase an entire imaging solution based on these
algorithms.
So what
benefits can you expect in terms of raw performance thanks
to these on-chip accelerators? Let's take just one example
from the TI media briefing, which compares the C55x to a
RISC processor, specifically a 200-MHz C55x to a 233-MHz
StrongArm SA110, both running MPEG-4/H.263 QCIF encoding at
15 frames/sec. The C55x needs 21M cycles/sec of its total
processing power to perform the task, whereas the StrongArm
needs 153M cycles/sec, a factor of more than 7.
And what about
some of the other chips on the market with architectures
intended to improve performance on video applications? Here,
the media briefing compares the C55x with the Intel/Analog
Devices FRIO, which is now available as the ADSP-21535
Blackfin. For an 8x8 DCT, the C55x requires 147 cycles,
whereas the Blackfin reportedly needs 284 cycles, a factor
more than 1.9 greater.
A final point
that TI likes to make regarding these on-chip accelerators
and libraries is how much horsepower is available for other
system tasks. For instance, the firm points out, even when
running CIF resolution at 30 frames/sec, the 200-MHz C55x
still has almost half of its bandwidth available for auxiliary
functions such as color-space conversion, the user interface,
security features, TCP/IP, voice recognition and text-to-speech
capabilities. Thus, most portable video applications should
need only one C55x or OMAP device to perform all the required
processing. Certainly, an ASIC solution can provide very
strong performance on video encode and/or decode, but the
system generally needs a second processor to handle auxiliary
functions.
|