ChipCenter Questlink
SEARCH CHIPCENTER
Search Type:
Search for:




Knowledge Centers
Product Reviews
Data Sheets
Guides & Experts
News
International
Ask Us
Circuit Cellar Online
App Notes
NetSeminars
Careers
Resources
FAQ
EE Times Network
Electronics Group Sites

  Chips

(Click here for older articles)

 Design Automation -- Chips Subsections 
Features
News
Resources
- Design Automation (Top Page) -

    Features

- New - 64-bit processor cores knock at embedded's door
A handful of prominent vendors are about to heave 64-bit microprocessor cores into the embedded-systems market. Though SuperH, MIPS Technologies and Toshiba would like nothing more than to see embedded designers break out of their 32-bit shackles, it's unclear how many designers are ready to take the leap. (Electronic Buyers' News)
- New - Intel CEO Barrett: Technology Innovation Leads To Economic Growth
Intel CEO Craig Barrett today said that the world's economies are increasingly driven by technology, and that technology investment and R&D are key to prosperity and economic development. Despite the current economic slowdown, the b (ChipCenter: WebScan)
Using synthesis in the analog-design flow
Trent McConaghy tells how analog-synthesis tools can help speed the analog-circuit-design flow, especaily in mixed-signal-system-on-chip design, in which the analog portion presents one of the biggest bottlenecks. (EDN)

    News

- New - ARM Introduces the RealView Developer Kit
ARM announced the launch of the ARMý RealView Developer Kit for network infrastructure, wireless and storage devices based on Intel XScale technology. Included in the ARM Developer Kit are C and C++ compilers; a macro-assembler and linker for processors based on the Intel XScale technology; the AXD debugger with support for on-chip trace capability; a JTAG debug interface; and a version of the ARM Firmware Suiteý that includes support for developer boards. (ChipCenter: WebScan)
- New - Peregrine Rolls Out PLL IC Family With Embedded EEPROM
Operating at frequencies from 500 MHz to 2800 MHz, the PE3341/PE3342 Ultra-Thin-Silicon (UTSi) PLLs incorporate an embedded 20-bit EEPROM memory that designers can program to set the PLL counter values at device power-up, which eliminates the need for any external programming support logic for fixed frequency applications. (Electronic Business)
- New - Startup rolls suite of cores, tools for DSP subsystems
Intellectual-property core vendor Adelante Technologies will serve up a soup-to-nuts suite of digital-signal-processing cores at the Embedded Systems Conference next week. The company's DSP Galaxic will include intellectual property (IP), subsystems and tools for the development of complete DSP subsystems for multiprocessor systems-on-chip. Galaxic, which bundles a raft of well-known concepts and proven DSP technology, will initially target wireless baseband processing and control applications. (EE Times)
- New - The MathWorks Rolls Enhanced Developers Kit For TI DSP
The new kit version reportedly provides improved integration with eXpressDSP software and development tools through its compatibility with Code Composer Studio 2.0 and 2.1 and expanded code generation support for popular TI DSP devices. (e-inSITE)
- New - Atmel Expands ARM-based Microcontroller Family
Four new products: the extended-memory AT91R40008 and AT91FR40162, the low-power AT91M42800A and the AT91M55800A have an ultra low-power mode and analog capability. Like all existing members of the AT91 family, they are based on the ARM7TDMI? 32-bit enhanced RISC processor core and are manufactured using high-density CMOS technology to keep die size to a minimum while ensuring maximum performance. (ChipCenter: WebScan)
- New - Boundary-Scan Testing Part 1
Here's a quick introduction to boundary scan testing. (ChipCenter: Test & Measurement)
- New - More layoffs hit Cadence's Tality
A fresh round of layoffs at Tality Corp., Cadence Design Systems' services organization, will take the employee count to around 700 ý roughly half of Tality's size in January 2001. (EE Times)
- New - Sequence taps Qualcore for SoC center in India
Sequence Design Inc. is establishing a system-on-chip design center in India's southern city of Hyderbad. Sequence (Santa Clara, Calif.) said the move will make partner Qualcore Logic Ltd. of India its virtual design center here. Also involved in the expanded partnership is Virtual IP Group Inc. (Sunnyvale, Calif.). (EE Times)
Avnet program aims to simplify complex designs
The company's Avalon Reference Design System program involves backplane designs, add-in cards, hardware intellectual property, firmware, application code and tools intended to create a plug-and-play design environment across a range of important embedded, communications and networking applications. (EE Times)

    Resources

ChipCenter Reference Library
This is your access point for lots of good information covering applications, design tools, consultants, intellectual property, trade shows and standards.
Standards Watch
Here is your access point to the standards world.

Click here to get your listing up.

Copyright © 2003 ChipCenter-QuestLink
About ChipCenter-Questlink  Contact Us  Privacy Statement   Advertising Information  FAQ