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Circuit Synthesis and Web-Based Design Reaches the Analog World
Barcelona Design Systems of Mountain View, California, has begun a Web-based
design service for experimental design synthesis of analog circuits. If you
are satisfied with the design, you may download a SPICE netlist for a fee. If
you have already registered as a user and have $2,500 deposited by credit card,
you may download your design immediately. In this article we describe Barcelona's
design service and provide an update on Antrim Design Systems' analog design
synthesis product. Antrim-MSS has just been released at this writing to complement
Antrim's mixed-signal simulation, characterization, and library calibration
products.
Digital circuit synthesis took the chip design community by storm over ten
years ago. Few, if any, custom, ASIC, or PLD designs are developed outside of
the design synthesis process. Solutions for analog circuit synthesis have not
been available until recently.
If a chip is to contain extensive analog circuitry, the analog designer or
design team typically designs at the circuit and device level, possibly reapplying
some circuits from previous designs. If digital logic is present on such a chip,
it may be designed at the circuit or gate levels, or with a relatively small
group of standard cells. If the chip is big "D" (much digital) and little "a,"
the digital and analog designers are applying vastly different design techniques
or methodologies, that is, until the recent availability of design services
and tools from Antrim and Barcelona.
As will be described later, the two available analog synthesis approaches offer
the user different approaches for specifying the design and evaluating the synthesis
results. The analog synthesis processes still entail more trade-off analysis
than digital logic synthesis. However, the new tools both bring digital and
analog design methodologies a bit closer together. Even though the underlying
design of digital semiconductor circuits depends upon analog circuit design
for a given fabrication process, until recently, digital chip designers have
not been required to incorporate analog circuit design solutions in their work.
With deep submicron technologies, the digital designer is confronted with a
number of analog circuit effects. See the article "Optimizing
Your Design Environment." Developers of digital design tools are now challenged
to solve these analog circuit effects to maintain the very successful and expeditious
"digital like" design methodology. RF circuit designers have all along solved
analog effects for their high-speed circuits.
The ever-increasing need for analog technology in the rapidly growing communication
and automotive product development arenas has provided more of a demand for
EDA solutions that help speed the design of analog and mixed-mode circuits.
In this article, I will summarize two of the most recent developments.
Barcelona Design Systems
Barcelona is offering a Web-based design service to synthesize analog and mixed-signal
circuits. Picasso, the op-amp tool, is available for design application, and
the Dali RF Passives Optimizer is at this writing available for free trial.
Design services with tools to design phase-locked loops and other analog circuits
will likely become available soon.
With a standard browser, users access Barcelona's Web site and specify the
fab and process for the op amp. The system then presents the user with performance
specifications, including default values for each parameter. Designers select
the overall goal -- for example, maximize slew rate or minimize quiescent power
-- of the design, and change the parameters as they see fit. Once satisfied,
they send that request to the Barcelona server farm, which sends back results
in less than a minute. If the design is not feasible, Barcelona will suggest
which parameters need to be relaxed in order to become feasible. As part of
the service, Barcelona offers users the ability to run a SPICE simulation right
on the site. Finally, the service provides a netlist for the design. More than
fifty different op-amp types are supported.
The company's Dali RF Passives Optimizer provides a synthesis and optimization
capability for the design of passive components such as inductors and resonators,
which are commonly used in analog and RF circuitry. Using simple forms to specify
various performance requirements, constraints, and electrical parameters (e.g.,
area, spacing, width, inductance, tank impedance, etc.), the designer can perform
a trade-off analysis based on near real-time feedback from the technology. Dali
provides the designer with the sensitvity of each of its parameter and constraint
fields, alerting the designer if certain specifications will significantly impact
the overall design objectives.
Dali also offers an analysis and simulation capability through the ASITIC technology
developed by Ali Niknejad at the University of California Berkeley. The ASITIC
technology is now available on the Barcelona site. ASITIC is an interactive
tool that allows an RF circuit engineer to design and simulate inductors and
transformers, and facilitates the planning and optimization of the layout of
metal structures in the presence of substrate effects.
After an introductory price of $500 for each op-amp SPICE netlist retrieved,
the pricing will be from $500 to $2000 per retrieval. At this writing, the pricing
for use of the Dali RF Passives Optimizer tool had not been established.
Supported fabs include TSMC, Chartered Semiconductor, AMI, and UMC.
Functions to be added to the service include comparators, bias cells, switched
capacitors, and phase-locked loops. A fir filter may be a longer term goal.
Bob Donkin, chief technology officer at Linear Technology, reports that the
Picasso Op Amplifier Optimizer worked to his satisfaction.
Antrim Design Systems
Antrim believes that Antrim-MSS analog design synthesis users have the opportunity
to create robust designs by employing multiple test bench optimization with
Antrim's A/MS simulator and by evaluating all performance measurements of a
circuit simultaneously. Antrim-MSS has a learning mode optimizer for quickly
adjusting circuit design parameters to resolve conflicting performance goals.
A database is created to collect the results of all working circuit configurations.
During synthesis to a new set of specifications, the MSS lookup mode is offered
to eliminate repetitive circuit simulations. Then, by combining these functions
with behavioral synthesis models in Verilog-A/MS, Antrim believes that the user
may quickly retarget orders of magnitude faster than in previous SPICE-based
methods.
With MSS, the design engineer's synthesis plans capture the design knowledge,
thereby providing a mechanism for documenting the steps used to create a design
in a form that is re-executable for new processes and performance specifications.
The synthesis plans may also be used to train new engineers and provide a mechanism
for IP protection. Top-down synthesis of mixed-signal circuits is enabled, providing
the capability for engineers to create a working circuit netlist tuned to their
specifications without requiring detailed knowledge of the design process.
Before the general release of MSS, Antrim's technology partners have been the
initial users.
Conclusion
At this writing, products and services from Antrim Design Systems and Barcelona
Design have just been released to the general market and have been in an evaluation
phase by initial users. It is expected that these new EDA technologies will
require substantial proof and long-term investment before analog designers can
apply it across the broad spectrum of their design needs. These are interesting
developments that have the potential to provide chip designers with a much-needed
edge when compared to the manual analog circuit tuning and iterative simulation
steps in use today.
URL References
www.barcelonadesign.com Copyright © 2000 Summit Innovation Inc.
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