I believe I need not explain more.

The Non-Ideal Resistor

Figure 2 - The Non-Ideal Resistor

It's quite complicated. The diagram in Figure 2 is pretty simplified. It's actually a distributed RC/diode network; inductor values have been safely ignored, and the voltage at nodes N1 to N4 can be anything: GND, VDD, a fixed voltage, varying voltages, etc. But of course, through proper use, the voltages at N1 and N4 should be lower than V_A and V_B all the time. Similarly, the voltage at N5 and N6 should be larger than V_A and V_B all the time. The reason is obvious: to avoid forward-biased implicit diodes.

And, of course, you can't forget noise, temperature coefficients, voltage coefficients, mismatches, process variations, width corrections, and the list goes on. After reading this article, you may even have the tendency to suggest using high-precision discrete resistors external to the chip! My suggestion is that as long as you know the capabilities and limitations of the various types of resistors available in the CMOS process you are working on, you will be able to make a judgment on what's best for you.

A non-ideal resistor can be modeled as follows:

where

  _sh = sheet resistivity
  L = length correction factor
  W = width correction factor
  TCR = temperature coefficient of resistance
  T₀ = reference temperature (usually 25°C).

Besides this bulky equation, modeling folks usually attach capacitors/diodes across the two terminals of the resistor just to cater for parasitic capacitance and implicit diodes (if any).

But before I start discussing actual resistors, keep in mind that not all the resistors discussed here will be readily available in your existing process, and even if they exist, you need to keep a lookout as to whether simulation models are available, and how they model non-ideal characteristics. The bottom line: did you check if your modeling folks did a proper job, or are you just happy to see there's no DC convergence in your analog circuit simulation?

Keep in mind that I am not going to go about explaining how to model these resistors as accurately as possible (I'm not a modeling person), but I just want to highlight what an analog designer needs to look out for when making a choice.

The Resistors

ý N+/P+ Salicided Polysilicon Resistor

This is actually gate polysilicon without the diffusion layers. Salicidation of polysilicon results in low resistivity (a few /µm), sometimes too small for any real use. The temperature and voltage coefficient is pretty low, making it one of the most linear resistors ever.

ý N+/P+ Non-Salicided Polysilicon Resistor

The same material as above, except that an additional mask is used to block out this region during the salicidation process. This prevents a silicide layer from being formed, and therefore the resistivity is much higher (100 /µm), making it the most commonly used resistor in CMOS processes. The temperature and voltage coefficients are as good.

ý N+/P+ Salicided/Non-Salicided Shielded Polysilicon Resistor

Figure 3 - Polysilicon Resistor with nwell Shielding

You can try to shield the polysilicon resistors from noise injected from the substrate by putting this resistor in an nwell biased to a quiet voltage. Of course, this quiet voltage must not be so LOW as to cause the parasitic diode to turn on.

ý N+/P+ Diffusion Resistor

P+ diffusion resistors are placed inside an nwell, whereas N+ diffusion resistors are placed in the p+ substrate (nwell process). In silicide technology, the diffusion layers have a low resistive layer (for example, titanium silicide) above them. The original intention was to reduce the drain and source resistance for the MOSFETs. This usually results in the composite layer having very low resistance values (10 /µm). If an additional mask is used to block out the silicidation process, the resistance can be greatly increased to something around 60 /µm.

There are implicit diodes that come with this resistor (p-sub/N+ diode for N+ diffusion resistor and nwell/P+ diode for P+ diffusion resistor). As such, you can imagine the depletion width of the diodes will vary with the voltages applied at both terminals of the resistor. This boils down to a high voltage coefficient.

ý nwell Resistor

Boy, this resistor is lousy. This is apparently due to the fact that the nwell depth formation during fabrication is not that well tracked. This results in resistance values that can very ±p;50%++. My recommendation is to use this resistor as a pullup/pulldown resistor. Avoid using them when precision values count. The only advantage of using this type of resistor is the high resistivity value, 1.2 k/µm, which saves area. The same implicit diode problem exists, and as such the voltage coefficient is poor. The temperature coefficient is poor as well.

ý Metal1/2/3/4/5/6…Resistor?!

Yes, this is possible, but is seldom used. I have seen this used in resistor DACs, where high accuracy is needed. The downside is that the resistivity is very low (m/µm), and there is a possibility of exceeding the recommended current density or electromigration limits.

ý Active Resistor Using MOSFETs

Figure 4 - Active Resistor Using MOSFETs

This should not be confused with R = V/I. The equation describes the small-signal resistance. The advantage of using this resistor is that the area required is much smaller compared to polysilicon or diffusion resistors.

Alternatively, you can tie the gate of the transistor to a fixed voltage, and make V_GS = constant. By operating in the linear region (V_DS < V_GS - V_T), you can get a pseudo resistor. Also, the larger the value of V_GS, the smaller the resistance.

That's all about resistors in CMOS technology.

Sorry, this column is no longer active and no feedback is possible.