Processes

(Use Search for older articles.)

IP -- Processes Subsections

Business

Licensing

Business

ASM International Sues Genus for Patent Infringement
ASM International N.V. announced that it has filed a lawsuit in U.S. District Court in the Northern District of California against Genus, Inc. for patent infringement. ASM charges Genus with infringing on two of the company's U.S. patents for Atomic Layer Deposition (ALD) technology originally developed by ASM. ASM markets the technology under the trade names Atomic Layer Chemical Vapor Deposition, Atomic Layer CVD(tm) and ALCVD(tm). (e-inSITE)

Licensing

Cree Announces Issuance Of Patent On Pendeoepitaxy Process Patent Licensed Exclusively to Cree, Inc.
Cree, Inc., announced the issuance of U.S. Patent No. 6,265,289 on July 24, 2001 entitled 'Methods of Fabricating Gallium Nitride (GaN) Semiconductor Layers by Lateral Growth from Sidewalls into Trenches, and Gallium Nitride Semiconductor Structures Fabricated Thereby.' The patent, licensed exclusively to Cree, Inc. by North Carolina State University, covers process technology known as pendeoepitaxy, or 'pendeo' for short, which refers to a process for growing gallium nitride semiconductor layers with low defect densities. (ChipCenter: WebScan)

News

Chartered Details Roadmap For 0.10-micron Semiconductor Manufacturing Process
Chartered Semiconductor Manufacturing, one of the world's top three silicon foundries, has announced the delivery milestones for its 0.10-micron semiconductor manufacturing process, which includes an all-copper, low-k dielectric solution with the baseline logic offering and an accelerated development schedule for the advanced mixed-signal module. A rigorous qualification process and pilot projects with partners are designed to yield a robust product suite, earlier silicon validation, and low-risk production. (ChipCenter: WebScan)
Taiwan's Foundries Drive Toward SiGe
Taiwan's two leading foundries have started a drive to match IBM Corp.'s silicon germanium (SiGe) technology. United Microelectronics Corp. (UMC) has developed its own SiGe process and is negotiating to license IBM's SiGe technology. Taiwan Semiconductor Manufacturing Co., which offers its own SiGe BiCMOS process at 0.5-micron design rules, struck a deal earlier this year to license SiGe intellectual property developed by Conexant Systems Inc. (EE Times)
LSI Logic Taps TSMC for Copper-Based Process
In a bow to Taiwan's chip-making savvy, LSI Logic Corp. said Tuesday (April 3) that it will tap Taiwan Semiconductor Manufacturing Co. for its copper interconnect and low-k dielectric process capabilities for 0.13-micron devices. The move is a tacit acknowledgment that foundries now have the expertise to match or beat old-guard chip companies in the race to new process technologies. (EE Times)

Standards

TSMC Executive Calls Upon Semiconductor Industry to 'Standardize' Around 0.10-micron Process
Dr. Genda Hu, vice president of corporate marketing for Taiwan Semiconductor Manufacturing Company (TSMC) has called upon the semiconductor industry to standardize on a single, open 0.10-micron semiconductor manufacturing process. Pointing to industry reports that the semiconductor industry likely will rally around only a few processes at this node, Dr. Hu indicated that TSMC is currently working with the industry's leading companies on this direction. (e-inSITE)
Starc Consortium Proposes 0.10-Micron Process Standards
Japan's semiconductor research consortium released its recommended design rules for 0.10-micron technology on Thursday (Aug. 23), and outlined a road map toward a common intellectual-property (IP) library to help Japan's struggling semiconductor industry build common platforms on which to produce system-on-chip devices faster and more cheaply. (EE Times)

Technology

NEC Turns to TSMC for 0.10-Micron Process Development
NEC Corp. is developing 100-nanometer process technologies that it plans to have ready for customers in early 2003. Standard and high-speed versions of the process are being developed in partnership with foundry Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC), while NEC is working alone on proprietary ultra high-speed and low-leakage versions. (EE Times)
Hitachi, European Chip Researchers Seek MOS Replacement
Hitachi Ltd. has joined Belgian-based semiconductor research center IMEC�s high-k affiliation program to find a replacement for MOS transistor technology. The two will cooperate on development processes with the aim of producing a 0.5nm effective oxide thickness (EOT) gate stack for sub-70nm devices. (Electronic News)
Chartered Mulls 130-nm Dielectric
Add Chartered Semiconductor Manufacturing Ltd. to the list of companies struggling to find the right low-k and lithography solutions for 130-nanometer (0.13-micron) manufacturing. The Singapore foundry is considering both the Black Diamond material from Applied Materials Inc. and the Coral dielectric from Novellus Systems Inc. and hopes to make a decision by the end of the year. (EE Times)

Resources

ChipCenter Reference Library
This is your access point for lots of good information covering applications, design tools, consultants, intellectual property, trade shows and standards.
Standards Watch
Here is your access point to the standards world.


		Click here to get your listing up.