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Pressure is on Third-Party Memory IP
by
Krishna Balachandran, Virage Logic Corp.
Silicon-proven third-party IP has emerged as a way for fabless
companies to effectively meet market pressures by enabling them to
focus on the portions of the SoC that constitute their core
competencies.
SRAMs for High-Performance Networking Applications
by
Kannan Srinivasagam, Cypress Semiconductor
SRAMs have long been a mainstay for networking applications. SRAMs that increase bandwidth have taken a leading role in many high-performance applications. These are referred to as No Bus Latency (NoBL), Quad Data Rate (QDR), and other brand names. This article highlights what advanced SRAM architectures are offered for the networking applications. The article also distinguishes the applications where different SRAM architectures are used and criteria that drive the SRAM selection.
 Cypress Doubles Dual-Port Memory Density to 18 Mb
LDRAMs vs CAMs/SRAMs: Part 2
Battle Brewing Between Rival Flash Architectures
RLDRAMs vs. CAMs/SRAMs: Part 1
IBM-Infineon Team Discloses MRAM at VLSI Symposium
Opinion : Archive
Micron Technology, Inc., Launches Industry's Fastest 1.8 V Flash Memory Targeting Mobile Applications
by
Jon Gabay
IDT Unveils Industry's First Family of x36, 18-Mbit Synchronous and Asynchronous Dual-Port Devices
by
Jon Gabay
Renesas Technology Releases "superSRAM" 16-Mbit Low-Power SRAM, Achieving World's Smallest Chip Size through Development of New Type of Memory Cell
Spansion Flash Memory Takes Technology Leadership with Sampling of World's First 512 Megabit NOR Flash-Memory Device
Xicor Introduces the First Dual Twin-Wiper 256-tap Digitally Controlled Potentiometer - X9455 Series
Infineon Samples the World's Smallest 1 Gbit Double Data Rate SDRAMs
Cypress Samples 18-Mbit Families of QDR, QDR-II, DDR, and DDR-II SRAMs
IBM, Infineon Develop Most Advanced MRAM Technology to Date
Cypress Samples Industry's Highest Density and Highest Bandwidth True Dual-Port RAM
SST Integrates High-Density NOR Flash Into Combination Memory Devices
by
Jon Gabay
Reviews : Archive
Micron Technology, Inc., Launches Industry's Fastest 1.8 V Flash Memory Targeting Mobile Applications
by
Jon Gabay
Spansion Flash Memory Takes Technology Leadership with Sampling of World's First 512 Megabit NOR Flash-Memory Device
by
Jon Gabay
Battle Brewing Between Rival Flash Architectures
Flash Memory : Archive
Rambus Reveals Details of New XDR DRAM Interface
by
By Jack Robertson, EBN
Although XDR DRAM initially will be aimed at consumer electronics and graphics applications, Rambus said that by 2006, the interface will be positioned for use in PC main memory in competition with industry-standard DDR architectures.
Industry : Archive
HyWire takes act into TCAM arena
Dual-port memories add 18-Mbitters
Briefs : Archive
92,000 I/Os per Second per Gigabit Ethernet Port!
Years ago, I heard the phrase "the network is the computer" from Sun Microsystems. It was thought provoking, especially as networking was just on the cusp of becoming commonplace. These days, with servers, spoolers, Internet, and distributed and shared applications, this is becoming more evident. Storage Area Networks (SANs) are another example of how a user at a desktop machine is part of something much bigger than just the desktop machine.
(ChipCenter)
Toshiba Adds Modified NAND Flash Memory for Easier Integration in Advanced Cell Phones With Complex Memory Subsystems
NAND flash memory has really made a mark in technology. While standard NOR flash is great for nonvolatile code storage and execution, the very high density of NAND has opened the gateway for great applications like digital cameras, MP3 players, voice recorders, advanced PDAs and cell phones, solid-state disks, and more. Toshiba's new "Chip Enable Don't Care" NAND allows the chip-enable signal to be deasserted during the "read busy" period. The result is that the microprocessor can communicate with other devices on the bus such as SRAM, PSRAM, or NOR flash while the NAND retrieves the requested information.
(ChipCenter)
Go to Archive
Microchip Technology Debuts First 512-kbit I²C™-Compatible Serial EEPROM in Low-Profile DFN Package
My first serial EEPROM was the old 24C02. This was an I²C 256-byte serial EEPROM good for storing configuration and setup data in a small microcontroller-based system. I wrote a simple bit-banged routine that easily accessed and wrote to the part. My thoughts back then were that "this would be nice if it was denser."
(ChipCenter)
Cypress Develops World's Highest Density Networking SRAM on 90 nm Process Technology
Remember when 1-million-transistor IC's were big news? This wasn't too long ago. Critics were saying "With that many transistors, reliability will be low, yield will be low, manufacturing would be difficult, and parts would be overpriced." Well, that wasn't the case. I recently reported on a 300-million-transistor network processor, and these numbers are almost common-place these days.
(ChipCenter)
SST Introduces 32-Mbit Flash Device with 1,000 times Faster Chip-Erase Performance Than Alternatives
We have seen NAND architected flash reach 2-Gbit densities, while NOR parts are in the 16- to 32-Mbit range. It would seem from that simple statistic that those who need density would shift over to NAND, but there is more to it than that.
(ChipCenter)
Crucial Technology Introduces Flash-Card Readers
These days, the average gizmologist has more than one device that takes advantage of modern flash cards. Advanced cell phones, PDAs, digital cameras, MP3 players, and even laptops can take advantage of the fast, small, lightweight, hot-swappable, and ever denser nonvolatile storage offered by this technology.
(ChipCenter)
ChipCenter Reference Library
This is your access point for lots of good information covering applications, design tools, consultants, intellectual property, trade shows and standards.
Standards Watch
Here is your access point to the standards world.
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