CATC's PETracer ML's hardware taps transparently into PCI Express fabric, letting its software capture, decode and display the traffic that's flowing. As the press release notes, the new PETracer ML is based on CATC's Universal Protocol Analysis System (UPAS) 10000 platform. We discussed the LED-equipped UPAS 10000 not too long ago in ChipCenter's review of CATC's BlueTooth analyzer.
Communicating with your host PC using Universal Serial Bus (USB) v2.0 (high speed), the UPAS 10000 accommodates a variety of CATC's protocol modules. In this case, a PETracer ML hardware module for the PCI Express protocol is installed into a UPAS 10000 chassis.
Dual Analyzers
As Mark Abbas states in the company's press release, the PETracer ML architecture also supports pairing of two UPAS/PETracer MLs. That can double the width of the PCI Express bidirectional link that can be monitored, from x4 to x8. This process is super-easy to set up, too.
All you need do connect two short coaxial cables to the unit's rear-panel BNC connectors. This lets you quickly create a cross-coupled loop for transmitting clocking information and commands between the two analyzers.
This linking permits the two to function as one logical analyzer. From a user point of view, the interaction between the two analyzers is transparent, requiring no further operator intervention.
Windows Software
Key to the usefulness of CATC's new multi-lane PETracer ML verification box is the company's CATC Trace software, as supplied in the firm's other analyzer products. It runs under Microsoft Windows.
Like its predecessors, this system works with PCs running Windows 98SE, Windows 2000, Windows ME, or Windows XP, where Windows provides the control/command interface, analysis, and means to record captured data.
The colorful and pleasing CATC Trace software is really what lets you get a handle on PCI Express's protocol hierarchy and intricacies. In use, the PETracer ML system displays gathered information, relying heavily on user-friendly graphics for statistical and error reporting. The software also lets you control the PETracer ML to set realtime triggering and filtering conditions. The nifty interface provides a summary of trace files to let you identify things such as track error rates and/or abnormal link or timing conditions.
This software promises to substantially speed up troubleshooting and debugging of PCI Express cores and chips, as well as system-level PCI Express components such as switches and bridges. It can record and display multi-lane links, revealing lane-to-lane skew, and also lets you view packet, transaction, and split transaction levels of the protocol.
With a hierarchical view in hand, you'll likely enjoy the task of drilling down into the details of PCI Express primitives, errors, payloads, and individual packets. The system will alert you if violations are detected, even as you drill down. You can also augment this by process by collapsing and hiding fields that aren't relevant to your analysis.
Hardware Triggering, Filtering
Kudos to CATC for implementing powerful hardware triggering. It lets you trigger on PCI Express events such as Link Conditions, TLP Headers, DLLP Messages, or Data Payload, letting you trigger, record, and display traffic logically, regardless of the physical configuration of the lanes. The hardware triggering captures events in realtime. Moreover, the system uses hardware filtering to filter packets.
There are other hardware elements worth discussing. In addition to the PCI Express interposer card that's inserted into your cardcage, CATC also includes an external breakout board. It permits you to get at potentially useful TTL and LVTTL I/O signals.
For example, the breakout board can let you hook up a logic analyzer or other instrument to the TTL lines. The board also has a handy prototyping area. It consists of 20 columns by 27 rows of plated-through holes, with routing for power and ground.
As CATC's press statement notes, the system is also shipped with a slot interposer card and a mid-bus probe. The mid-bus probe is a 16-channel differential signal probe.

Click for larger drawing
Providing connectorless attachment to your device under test, the mid-bus probe supports the data link configuration recommended in Intel's PCI Express Mid-bus Probing Footprint and Pinout document, Rev. 1.0.
In use, the low-parasitic loading mid-bus probe supports upstream and downstream channels of one x8 link, upstream and downstream channels of up to two x4, x2 or x1 links, and upstream or downstream channels of up to two x8, x4, x2 or x1 links. CATC can also supply custom combination configurations.
The mid-bus probe is also equipped with one clock probe. The mid-bus reference clock probe captures clock signals from the system board in the two configurations recommended by the Intel guideline (tapping off of an existing clock and, alternately, a dedicated clock).
In these days of communications-centric products, testing and analyzing protocols is more important than ever. Not only must you verify proper operation, you've got to ensure compliance with standards, too.
Using a protocol analyzer such as the PETracer ML during product development can spell the difference to successful time-to-market, or not. The investment of about $45,000 (for a x4 PETracer ML), or even about $80,000 (for a x8 spin) can repay itself handsomely in achieving time-to-money when your product hits the open marketplace.
For more details, contact Eric Jong at Computer Access Technology Corp., 2403 Walsh Ave., Santa Clara, Calif. 95051-1302. Phone: (800) 909-2282, or (408) 727-6600. Fax: (408) 727-6622. Email: sales@catc.com.