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(Click here for older articles)
- New - Credence expands bench-top Kalos Credence Systems Corp. hopes its latest flash memory tester will take advantage of increasing development activity involving sub-2V flash applications. Credenceýs 100MHz Personal Kalos XZ can be configured for up to 96 pins, including 32 low-capacitance pins. (Electronic News) Teradyne flexes its muscle The Integra Flex can be equipped with multiple instrument boards, each with their own independent timing generation system, that plug into the test head. Parallel DC-to-microwave analog, high density CMOS differential digital, scan and memory test instruments can all reside in it's air cooled test head. When testing mixed signal, linear, or doing memory redundancy analysis, Integra Flex moves and processes digital signal data in the background, in parallel with testing, according to Teradyne. (Electronic News) Deep-memory scopes done right Agilent Technologies Inc. introduced three 600 MHz to 1 GHz mid-range, feature-rich Infiniium MegaZoom deep-memory oscilloscopes designed to accelerate R&D in the communications, defense, and semiconductor industries. (ChipCenter: Test & Measurement)
Deep-memory o'scopes make logic analyzer-like timing measurements Though these are moderately priced instruments, they're exciting to see and use. If you need to look at signals in both digital and analog domains, Agilent's older 54620 Series and its newest 54640 Series scopes, with their monochrome CRT displays, may fill the bill. Both the company's mixed-signal oscilloscope (MSO) models and the more mainstream 2- and 4-channel models serve mixed-signal needs out to either 350 MHz or 500 MHz at 2 Gsamples/s sampling rates. (ChipCenter: Test & Measurement) Analog simulation tools look to better Spice Nassda (Santa Clara, Calif.) said HSIM 2.0, the latest version of its full-chip verification tool, identifies power leakage and other parasitic effects peculiar to nanometer-scale IC designs. Ansoft (Pittsburgh) will announce version 4.0 of its Turbo Package Analyzer tool, which analyzes electromagnetic effects and other parasitics in complex semiconductor packages. (EE Times)
- New - Logicvision and Dolphin Technology partner on embedded test LogicVision, Inc., a leading provider of embedded test IP for integrated circuits and systems, launched a broad partnership with Dolphin Technology, Inc., a provider of performance-optimized SoC memory cores and performance-matched standard cell libraries and Input/Outputs (IOs). The partnership between Dolphin and LogicVision will enable tighter integration of memory and logic library SoC design elements with embedded test SoC design techniques. (ChipCenter: WebScan) ATMOS selects Avant!'s Star-SimXT for verification of high-density embedded memory macros Avant! Corporation announced that ATMOS Corporation has selected Star-SimXTý simulation for full-chip analysis and verification of its SoC-RAM embedded memory macros that range in size from 1 Mbit to 64 Mbits. Star-SimXT, with its rapid timing and power verification, True-Hspiceý accuracy, and easy post-layout analyses with full back annotation, enables the high-quality production of customer-specified, compiled memory cells by ATMOS. (ChipCenter: WebScan) Researchers propose dual design verification model Indian researchers are proposing a novel verification methodology that uses two representations of a design throughout the verification process, one a behavioral model in C and the other an RTL model. The dual design verification methodology (DDVM) is intended to replace traditional methods and tools considered inadequate to handle complex, deep submicron designs. (EE Times) Infineon selects Agilent Technologies' semiconductor parametric test systems for testing of silicon wafers used in memory devices The test systems will be used in Infineon's Dresden, Germany facility as the company moves toward volume production of 300mm silicon wafers.The Agilent 4072A will provide an all-in-one solution that meets advanced semiconductor process needs by providing high throughput, production parametric test, ring oscillator measurement, flash cell evaluation and advanced wafer level reliability (WLR) tests. (ChipCenter: WebScan)
Logic analyzers and deep-memory scopes learn to march in lock step Cross-instrument measurements have been hampered by a lack of tools for quickly and accurately deskewing or time-aligning traces and by the absence of sufficient memory depth in all but the most expensive scopes. Fortunately, recent advances in both scope memory depth and in automated deskew have opened the door to quick and accurate time-correlated measurements. (EDN)
ChipCenter Reference Library This is your access point for lots of good information covering applications, design tools, consultants, intellectual property, trade shows and standards. Standards Watch Here is your access point to the standards world. Georgia Ann Beyersdorfer, Memory Technology consulting editor, has currently completed Suffolk University with a Bachelor of Science in Electrical Engineering. Your comments are welcome!
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