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  Memory EDA Tools

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 Memory Technology -- Memory EDA Tools Subsections 
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- Memory Technology (Top Page) -

    Features

- New - Tools help you lose the hardware blues
EDA software seems to be the only silicon assistance that some programmable-logic companies want to talk about nowadays. What other tools are available to simplify your task of designing hardware? (EDN)

    New Products

Embed your memories
Virage Logic's new Embed-It! 3.0 intellectual-property platform comprises Architect, Integrator, and Automated Characterization. (EDN)
SST unveils enhanced tool suite to support its FlashFlex51 family of 8-bit 8051 microcontrollers
The new SoftICE tool was specifically developed to support the FlashFlex51 In-Application Programming (IAP) scheme that was unveiled by SST in 1997. IAP allows the MCU to concurrently execute user code while updating the flash contents in the background. It allows customers to make 'field upgrades' of the flash contents (both program code and data) at any time in the product's life cycle via an Internet or LAN connection, while the product remains in use or in service. (ChipCenter: WebScan)
New serial EEPROM programmer offers complete production and repair solutions
Whether you just want to read and store data from EEPROMs in televisions etc. to simplify your repair task or recover lost security codes for your car radio, or you want to program EEPROMs on the production line for product configuration and QA information, or debug microcontroller/EEPROM systems, this product is ideal for you. (ChipCenter: WebScan)
Dual PWM controller offers complete solution for DDR memory bus termination
Defined with guidance from Intel and AMD systems engineers, the features of the FAN5236 greatly simplify the task of designing high-performance memory systems that conform to industry DDR interface standards. (ChipCenter: WebScan)
Crossware adds support for Philips and Atmel W&M flash memory microcontrollers
Crossware has added support to its 8051 Development Suite for the Philips and Atmel W&M 89C51Rx2 variant flash microcontrollers. This will provide programmers using these chips with an accelerated development environment and eradicate the need to purchase a separate in-circuit hardware emulator. (e-inSITE)
Artisan Components' industry-standard 0.10-micron design platform now available for free download
Artisan Components announced that IC designers can download, free of charge, its next generation libraries for jumpstarting 0.10-micron designs. First to distribute 0.10-micron design kits, Artisan offers IC designers a broad and fully integrated solution that includes its industry-standard memory generators, standard cell and I/O libraries. (ChipCenter: WebScan)
Synopsys and Silicon Metrics deliver memory characterization solution for SoC Design
Synopsys and Silicon Metrics announced the availability of their memory characterization solution based on Synopsys' NanoSimý multi-level mixed-signal simulator and Silicon Metrics' SiliconSmart MRý. The solution leverages the NanoSim hierarchical array reduction (HAR) technology and the SiliconSmart MR memory characterization and modeling tools to deliver production-ready memory models for SoC design. (ChipCenter: WebScan)

    News

Japan's Sharp integrates multiple ICs into single system
Sharp Corp (TSE:6753) has developed technology that can integrate five or more memory circuits and other ICs (integrated circuits) into a single system. The company developed a 0.5mm-thick package circuit board that incorporates two memory ICs. The chips are fixed in the center of the circuit board, and integrating three of the packages results in six memory chips being integrated into a single system. (e-inSITE)
Mosys, Iroc target IC error protection
Iroq offers a suite of IP that includes a code generator, code bits and error logic that is said to keep errors to zero. To combat errors in logic, it has come up with another special cell to catch and fix faults before they make their way to the registers, at which point they can cause failures. For its part, Mosys is pushing technology it says will significantly reduce its own soft-error rate by adding error correction to its memory cell. It will offer the technology to customers in macro form. (EE Times)
Virage enhances Embed-It memory design platform
Virage has improved the Layout Assembler feature in the Virage Architect tool, which designers use to produce embedded-memory compilers, such as register files, SRAMs, DRAMs, ROMs, EPROMs, flash and content-addressable memories. (EE Times)
Mentor Graphics announces support for Actel's ProASIC Plus devices
Actel Corporation (Nasdaq: ACTL), a supplier of innovative programmable logic solutions, and Mentor Graphics Corporation (Nasdaq: MENT), announced that the Mentor Graphicsý LeonardoSpectrumý synthesis tool supports Actel's new second-generation family of flash-based field-programmable gate arrays (FPGAs), called ProASIC Plus. (ChipCenter: WebScan)

    Resources

ChipCenter Reference Library
This is your access point for lots of good information covering applications, design tools, consultants, intellectual property, trade shows and standards.
Standards Watch
Here is your access point to the standards world.

Georgia Ann Beyersdorfer, Memory Technology consulting editor, has currently completed Suffolk University with a Bachelor of Science in Electrical Engineering.
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