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CHANDLER, Ariz.--March 5, 2003--Microchip Technology Inc. announced an industry first by offering a 512-kbit I²C-compatible serial EEPROM in an 8-pad dual flat no-lead (DFN) package. The 24LC512, 24AA512, and 24FC512 are implemented in the company's advanced PMOS Electrically Erasable Cell (PEEC) process technology, enabling Microchip to offer high-density, low-power EEPROM devices in one of the thinnest packages available (0.9 mm). The 6 mm × 5 mm DFN package enables designers to use a 512-kbit serial EEPROM in low-headroom applications while reducing cost and increasing available board space. Users currently using Microchip's 128-kbit or 256-kbit EEPROM memory devices now have the option to design in a higher density EEPROM while retaining the same footprint. Additional packages include an 8-lead PDIP, an 8-lead SOIC, and a 14-pin TSSOP.
Microchip's PEEC cell represents its newest and most advanced generation in a long history of EEPROM innovation, quality, and features. In addition to shrinking high-density devices into tiny packages, the process maintains Microchip's leadership in quality and reliabilitymore than 200 years data retention and 1,000,000 Erase/Write cycles at 85°C. Each of the three devices has a page-write capability of up to 128 bytes, and is capable of random reads throughout the entire array. Functional address lines allow up to eight devices on the same bus, for a maximum of 4 megabits total address space. Additional features include a fast write time of 5 ms, a clock rate of 400 kHz throughout the operating voltage range from 2.5 V to 5.5 V and temperature range from -40°C to +85°C.
A high-speed version of this chip, the 24FC512, is capable of operating at a bus speed of 1 MHz over the same voltage and temperature ranges. The low-voltage version (24AA512) operates between 1.8 V and 5.5 V, making it ideal for battery-powered applications. The 24LC512 targets advanced, low-power applications, including cell phones, caller ID, set-top boxes, pagers, Bluetooth technology or wireless accessories, consumer electronics, ISO cards, and data-acquisition systems. Each of these markets requires high-density, compact, nonvolatile memory for data storage.
Pricing in 10,000-unit quantities is $1.83 each for the 24LC512 and 24AA512 devices, and $1.88 each for the 24FC512. Samples and volume production are available now. For more information, contact any Microchip sales representative or authorized worldwide distributor, or visit www.microchip.com.
Microchip Technology Inc. manufactures the popular PICmicro® field-programmable RISC microcontrollers, which serve 8- and 16-bit embedded-control applications, and a broad spectrum of high-performance linear and mixed-signal, power-management, and thermal-management devices. The company also offers complementary microperipheral products including interface devices, microID® RFID devices, serial EEPROMs, and the patented KEELOQ® security devices. This synergistic product portfolio targets thousands of applications and a growing demand for high-performance designs in the automotive, communications, computing, consumer, and industrial control markets. The company's quality systems are ISO 9001 (1994 version) and QS9000 (1998 version) certified.
Microchip is headquartered in Chandler, Arizona, with design facilities in Mountain View, California, and Bangalore, India. A European Design Center is located in Lausanne, Switzerland, and semiconductor fabrication facilities are located in Tempe and Chandler, Arizona, Gresham, Oregon, and Puyallup, Washington. Assembly and test operations can be found near Bangkok, Thailand. Microchip employs approximately 3350 people worldwide, and has sales offices throughout Asia, Europe, Japan, and the Americas. More information on the Company can be found at www.microchip.com.
The Microchip name and logo, PIC, PICmicro, microID, and KEELOQ are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. I²C is a trademark of Philips Corporation. Bluetooth is a trademark of Bluetooth SIG, Inc. All other trademarks are the property of their respective owners.
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Serial EEPROM Hits 64K × 8
My first serial EEPROM was the old 24C02. This was an I²C 256-byte serial EEPROM good for storing configuration and setup data in a small microcontroller-based system. I wrote a simple bit-banged routine that easily accessed and wrote to the part. My thoughts back then were that "this would be nice if it was denser."
I've been watching and reporting as densities got bigger and bigger. From 2Kx8 to 8K × 8 and so on. My thoughts were that "these are approaching densities useful for more than just parametric setup." On one project, I wrote an assembly-language BASIC interpreter and used the serial EEPROMs to store the BASIC program. While slow executing compared to parallel access, it worked, and was small and flexible.
Now MicroChip is introducing a 512-kbit I²C serial EEPROM organized as 64K × 8. This is a nice leap in density and usefulness. This density opens up the door for more widespread use in more varied applications. For example, most high-performance embedded systems cache boot firmware into higher speed static or dynamic RAM to keep the processor fed with instructions and data. Typically, parallel flash is used to hold boot loader code, which is accessed relatively slowly (compared to cache speeds), then deposited into the cache for run-time use.
This works pretty well, but the typically asynchronous parallel memory bus for the flash will for the most part be used only at power-up. Then a synchronous high-speed bus will be used after that. This is a lot of pins, a comparatively large memory-interface block, maybe some decode logic, and a fair amount of PC board space just for this one-time boot sequence.
With densities like 64K × 8, the embedded controller can reduce 26 pins to 2 and eliminate a typically 32-pin memory component with a small 8-pin part. This is an eye-opener. Maybe micro makers will implement an I²C boot interface to make this feasible.
True, the initial boot and load time will be a bit slower, but the space and cost saving may offset that enough to make it desirable.
The Microchip parts are offered in three flavors. The 24AA512 runs at 1.8 V to 5.5 V at the standard 400 kHz. The 24LC512 uses 2.5 V to 5.5 V at 400 kHz. I like the 24FC512, which runs at 2.5 V to 5.5 V and increases the bus speed to 1 MHz. Even though it may not play nicely with other 400 kHz parts on the same bus, sacrificing 2 I/O lines as a dedicated boot loader is not so bad.
I really like the reliability specs on these parts. Implemented in the company's PMOS Electrically Erasable Cell (PEEC) process technology yields 200 years of data retention and 1,000,000 Erase/Write cycles at 85°C.
I also like the page-write capability. Here, up to 128 bytes can be written sequentially at higher speed. The self-timed erase/write cycle takes only 5 ms, compared to the 50 ms of older parts. The part can be read randomly as well like older versions.
I also like how up to eight devices can coexist on the same bus for a maximum of 4 megabits total address space. Note that the addressing scheme requires a second address byte to allow the full 16-bit address, compared to the older 16K parts, but this is easily addressable in firmware.
In addition to standard 8-pin PDIP, SOIC, and DFN, these parts are also offered in a 16-pin TSSOP. The DFN is especially attractive since it is only 0.9 mm high, making it ideal for small, thin applications that don't give much headroom.
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