"Our partnership with Siemens gives GateField access to leading-edge 0.25-micron FLASH technology in the same time frame that the programmable logic leaders have access to 0.25-micron CMOS process technology," commented Peter Feist, GateField's vice president of marketing. "This will allow us to demonstrate the substantial benefits that GateField's ProASIC technology can provide on cost, performance, density and productivity, to electronic system companies that are using programmable logic and ASIC devices."

During the course of the last nine months, process development and product design teams from both companies have worked closely together. Test silicon results have confirmed that GateField's patented FLASH memory cell/switch combination and its very high density programmable structures have been successfully implemented in Siemens' mainstream C9FL FLASH process. GateField expects to sample first ProASIC products, based on Siemens' 0.25-micron FLASH technology, during Q4/98 and Q1/99.

The foundry agreement is a long-term agreement, currently until 2001. Initial ProASIC products manufactured by Siemens will utilize their advanced 0.25-micron FLASH process.

GateField intends to target the 30K-gate to several 100K-gate range of FPGA designs. The logic core will operate at 2.5 volts and each of the I/Os can be selected for either 2.5-volt or 3.3-volt interfacing. The part can accept 5-volt TTL signals, but will not tolerate 5-volt CMOS signal levels. The I/Os are PCI compliant and programmable clamp diodes are used to meet the 3.3-volt PCI requirements.

GateField's ProASIC devices are the only FPGAs that are both reprogrammable and non-volatile. According to the company, the flash switch takes one-seventh of the area of an SRAM switch when built using comparable processes. In addition, the combination of the Siemens 0.25-micron flash process and the ProASIC architecture require only three layers of metal as compared to five for Altera's and Xilinx's 0.25-micron devices.

The smaller switch and simpler process lead GateField to the claim that is devices will be smaller and cheaper than SRAM-based FPGAs. In fact, the company claims that a 0.25-micron 100K-gate ProASIC device with embedded SRAM memory will be one-third the size of a 0.25-micron Altera EPF10K100E and even smaller than a comparable density Xilinx part.

Similar claims were once made for the antifuse FPGAs being produced by Actel and QuickLogic, which contained fuses that were significantly smaller that SRAM switches. These claims never materialized in the real world because of higher processing costs, lower yields, the amount of chip area required for programming the fuses, and the fact that antifuse processes typically were one or two generations behind the processes being used to produce SRAM devices. This last factor has changed recently, with both Actel and QuickLogic shipping 0.35-micron FPGAs.

It will be some time before we know if the smaller ProASIC die really result in lower cost devices. GateField, however, is backing up its low-cost claim with an end of 1999 projected price of $35 for 10,000 quantities. This is for parts with a density comparable to Xilinx's 0.25-micron/5LM 40125XV or Altera's 0.25-micron/5LM 10K130E.

One of the disadvantages of the current 0.6-micron ProASIC parts is their relatively slow speed. The low speeds result from the fine-grained logic cell architecture used in conjunction with a high-impedance switch. While the flash-based switch resistance is one-third that of an SRAM switch, it is still significantly higher than that for an antifuse. The logic capacity in GateField's devices is about four gates, compared with twelve gates for the look-up-table/register cell typical of SRAM-based FPGAs.

The company's calculations indicate that the Siemen's 0.25-micron flash process will result in devices that are 50% faster than Flex 10K Altera parts and, at the same time, consume about one-half the power of a Xilinx XC4000XV. All of this sounds remarkable, but as we all know--the proof of the pudding. . .