Faster Product Development and Easier Product Upgrades with In-System Programmability

By Chris Schell, Philips Semiconductors (chris.schell@abq.sc.philips.com)

With decreasing product life cycles and growing time to market constraints, designers need to find ways to develop and upgrade products faster. One way to do this is to use programmable logic devices (PLDs) with in-system programmability (ISP) in the product. ISP gives designers the capability to program or re-program a PLD after it has already been mounted on a PC board--and even after the product has been delivered to a customer. By eliminating the need to use an external programmer for the PLD, this speeds product development by allowing prototype PC and final product boards to be the same, and by allowing last minute design changes to be made without having to change the board. Because changes can be made and verified instantaneously, this allows for the design to evolve quickly into the finished product. It also allows for extra features to be incorporated into the design at any time without delay. Product upgrades are simplified because the PLDs can be reconfigured at the customer site. Changes can be done remotely or by sending new configuration information for the PLD to the customer via phone lines, the Internet or with software upgrades.

Without ISP, an external programmer is required to change the functionality of the PLD. In this case, the PLD must be removed from the PC board, reprogrammed in the programmer and then remounted on the board before the change can be tested. This not only lengthens the amount of time required to make and test the change, but the popular fine pitch packages and ball grid arrays (BGAs) of today are difficult to remove and remount on the PC board without permanently damaging the leads. This complication requires designers to either prototype using a socket or sacrifice packages when they are damaged during removal. When a socket is used, this either means that the prototype PC board is different from the one that will make it into production, or that the socket will have to be used in production. If the final production board is different from the prototype, the risk of the final product behaving differently from the prototype is increased. This two-board approach adds delay to the product development because it takes time to develop a new board after the prototype system is up and running. If the socket is used in production, the cost of the final product is increased.

Figure 1 shows how ISP improves the design cycle by eliminating these problems. Prototyping with ISP allows the PC board used for the prototype to be the same as the one used in the final product, which means that the final PC board can be developed in parallel with the logic functions of the PLD. After the board is manufactured, the logic function is tested in the board that is to be used for the final product. Any fixes to the logic function are made and then programmed into the PLD through ISP. The need for a prototype board that is different from the final product and the need to remove and remount devices to make changes are eliminated, which saves valuable time during the product development. Also, with no board changes, there is no risk that the final product will behave differently from the prototype; and the cost of the socket is removed as well.
Figure 1: Design cycle comparison for ISP and non-ISP approach.

The greater percentage of the product that is built with programmable logic, the greater flexibility there is to make changes and add features. PLDs can be chained together, and one or all of them in a product can be reprogrammed to make changes in the design. A common way to chain the devices together is through a JTAG (IEEE 1149.1) scan chain. This "chain" of devices allows for all JTAG compatible devices to be connected in series to a single header on the board. Individual devices in the chain can be singled out and reprogrammed at any time. Thus, designers are not limited by the size of a single deviceımultiple devices can be used, and any part of the devices can be changed to accommodate the needs of the design. As device densities increase and package sizes shrink designers are able to add more and more flexibility without the need to increase board size and chip count. ISP makes this possible because the chips are put on the board once and never moved again.

Once the product has been delivered, ISP can also be used for "field upgrades" to the product. This means that the PLDs are reprogrammed while the product remains in placeıthere is no need to return the product to the factory or replace the product with a new one to get the upgraded version. To do this, the product designer builds a JTAG interface into the final product, allowing a path for the PLDs to be upgraded in the field. The JTAG interface consists of two things: 1) a five-pin header on the PC board through which the new code is programmed into the PLD and 2) the software program that controls the signals and timing through the header. All that is required for the upgrade to be done remotely is for the program to be connected to the JTAG header of the product. For example, PC boards in telecom switches can be field upgraded via the phone lines without having to shut down the switch and replace the old boards with new versions. The JTAG header is built onto the PC boards in the switch, and the program resides on a computer at a central location for the switch manufacturer. The program and the header are connected via phone lines and upgrades can be done remotely at any time through the JTAG interface. Alternately, the new program for the PLDs can be downloaded to a local memory on the PC board and a microcontroller can later re-configure the PLDs with the new code. In either case, the upgrade is done in place. Without ISP, the system would need to be shut down and taken apart to physically replace the boards or the PLDs.

A specific example comes from a product that uses two Philips Semiconductors PZ3960 CPLDs in a piece of test equipment that works with a personal computer at the customer's site. This example shows how ISP can be used to automatically update products without having to ship new boards or chips to the end customerıthe upgrade to the physical product becomes an integral part of the upgrade to the software. The product is connected to the parallel port of the PC and there is a JTAG header inside the product that connects both CPLDs to the port. It is shipped with no program inside the CPLDsıthe configuration is shipped with the software that is installed on the PC. By building the JTAG signal control and timing into the software, the product developer is able to program the PZ3960 devices through the parallel port. In this particular product, the CPLDs are reprogrammed every time the product is turned on and the software is activated. This allows the product developer to upgrade the product by bundling new CPLD configuration information with new software versions. The new software versions can be sent to the customer through the mail, or they can be downloaded from the Internet. With the use of computers and the Internet, upgrades to firmware products could become even more "invisible" to the customer. Imagine being able to upgrade PC peripheral products automatically for customers whenever they connect to your web site. This becomes possible if products are designed with upgrade paths in mind.

While it sounds like a great thing, designers planning to use ISP for product development and upgrades should be careful when choosing the PLD that is to be used. Not all PLDs have the ability to make changes to the design without having to change pin locations or system timing. When ISP is used, pin locations are already defined, and system timing has been built around expected signal delays through a given device. If the desired logic change cannot be made without having to re-layout a board and re-work system timing, then the benefits of ISP would be lost. The design cycle shown in Figure 1 assumes that changes do not require the PC board to be changed. That cycle can easily be lengthened if the PLD does not allow the changes to be made with the existing pin assignments. It is also difficult to upgrade existing products at a customer site when the new design requires a different PC board. Designers should carefully examine the architecture and timing model of a device before expecting to be able to make last minute design changes without having to alter pin-outs and system timing. Product-term sharing architectures, such as the one in Philips Semiconductors' CoolRunnerTM CPLDs, give excellent pin-out retention characteristics and system timing is maintained through any change. Be wary of CPLDs that use product-term steering architecturesıthese will not be able to maintain pin-outs and timing with design changes, especially at high utilization. Also be wary of FPGAs with small numbers of horizontal and vertical routing channels; the limited interconnect of these channels can make design changes difficult if both pin locations and timing are preserved. ISP can dramatically speed product development cycles and simplify product upgrade proceduresıthe trick is to choose a device that gives you the flexibility required to make both happen.

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