Introduction

The principles of orthogonal frequency division mulitplexing (OFDM) modulation have been around for several decades. However in recent years, this technology has quickly moved out of the academia world into the real world of modern communication systems. New advances have brought a fresh face to the benefits of OFDM in data delivery systems over phone lines, digital radio, television and, most importantly, wireless networking systems. In recent years OFDM scheme has become the underlying technology for various emerging applications such as digital audio/video broadcast, wireless LAN (802.11a and HiperLAN2), broadband wireless (MMDS, LMDS), xDSL, and home networking. Programmable logic devices (PLDs) are playing a fundamental role by facilitating the deployment of OFDM based systems worldwide by making it easier for the engineers to integrate complex intellectual property (IP) blocks and utilize the benefits of high-performance PLD architecture.

OFDM is a multi-carrier modulation scheme that encodes data onto a radio frequency (RF) signal. Unlike conventional single-carrier modulation schemes–such as AM/FM (amplitude or frequency modulation)–that send only one signal at a time using one radio frequency, OFDM sends multiple high-speed signals concurrently on specially computed, orthogonal carrier frequencies. The result is much more efficient use of bandwidth as well as robust communications during noise and other interferences.

Frequency division multiplexing (FDM) theory states that aggregate bandwidth is divided into several subchannels, spaced with guard bands to reduce interference, each of which is transmitted simultaneously. OFDM systems require significantly less bandwidth than traditional FDM systems. Through the use of special noninterfering orthogonal carriers, guard bands are not required between individual subchannels–allowing the available spectrum to be used more efficiently.

OFDM has been chosen for several current and future communications systems all over the world. It is well suited for systems in which the channel characteristics make it difficult to maintain adequate communications link performance. Wired systems such as asynchronous digital subscriber line (ADSL) and cable modem utilize OFDM as its underlying technology to provide a method of delivering high-speed data. Recently, OFDM has also been adopted into several European wireless communications applications such as the digital audio broadcast (DAB) and terrestrial digital video broadcast (DVB-T) systems. In the United States, OFDM has been adopted in multipoint multichannel distribution services (MMDS). Both wireless LAN applications–using standards such as IEEE 802.11a–and the new European Telecommunications Standard Institute’s (ETSI) HiperLAN/2 specification have also installed OFDM as the modulation scheme. As shown in figure 1, these various OFDM technologies map to different layers of the OSI model.

Figure 1. OFDM Technologies Mapped to the OSI Model

Rollout of OFDM systems has just started to intensify, and the adoption of OFDM in the PHY layer for several different wireless standards is eminent. AT&T’s fixed wireless residential broadband service is built around OFDM, and is projected to serve over 15 million homes by the end of 2002. AT&T and Nortel Networks are considering the feasibility of fourth-generation wireless networks, with EDGE proposed as the uplink, and OFDM suggested as the downlink. Motorola recently unveiled new wireless home-networking solutions built around the HomeRF wireless proposal, which also uses OFDM in the PHY layer. In the home networking space, working groups such as HomeRF and HomePlug have adopted OFDM multi-carrier modulation. Key advantages to the adoption of OFDM in the PHY layer for these applications include simplified equalization for narrowband channels, high system throughput, and immunity to noise.

Programmable logic offers compelling advantages over other alternatives such as DSP processors for its usage in OFDM applications. PLDs can be thought of as an array of elements, each of which can be configured as a complex processor routine. These processor routines can be then strung together in serial (the same way as a DSP processor would execute them), or they can be connected in parallel. In parallel they offer greater performance than a DSP processor by executing hundreds of instructions at once. Algorithms that especially benefit from this type of performance increase include forward error correction, modulation/ demodulation, and encryption.

For example, the Altera Reed-Solomon DSP IP core decodes at a rate of 800 Mbps for 8-bit symbols. For systems requiring higher throughput, the DSP IP cores can be instantiated using dedicated hardware in parallel. For nominal buffering and control overhead, the Reed-Solomon function can decode at a rate of over 10 Gbps. By comparison, preliminary Texas Instruments benchmarks of the C64xx DSP processor requires approximately 1095 cycles to decode one Reed-Solomon code word. At 300 MHz, the C64xx processor is able to decode approximately 450 Mbps, using 100% of the processing power available in the device.

Programmable logic when combined with myriad of DSP IP (intellectual property) cores are ideally suited to implement high-performance and cost-effective OFDM systems. The abundance of memory found in current PLD devices such as Altera’s APEX 20KE is a key feature for implementing memory-intensive functions such as FFT, as well as for buffering intermediate signals within the datapath.

Figure 2. Typical OFDM Transmitter Block Diagram
Click to enlarge

Figure 2 shows the typical elements of an OFDM transmitter. Systems using OFDM modulation utilize channel coding to combat multipath propagation. Data symbols are then mapped onto an appropriate constellation (i.e., QPSK, QAM). The resulting I and Q values are stored in a buffer, and the inverse fast Fourier transform (IFFT) is applied. The IFFT performs the modulation on orthogonal carriers. The data is then prepared for transmission, i.e., serialized and appended with a cyclic prefix for multipath immunity. The resulting data is then sent to an antenna for transmission. As shown in Figure 2, a typical OFDM transmitter system consists of several key blocks, which can be categorized into two main categories — forward error correction (FEC) and modulation/demodulation. Designers can implement these two key OFDM building blocks by using Altera’s suite of IP cores on its PLDs.

Forward Error Correction

The FEC section of an OFDM system can be addressed by either a block-based coding scheme (Reed-Solomon) or a convolutional coding scheme (Viterbi, Turbo). OFDM systems using FEC techniques are also referred to as coded-OFDM (COFDM) transmitters. FEC enables the receiver to correct errors automatically without requesting re-transmission. FEC is based on adding redundant parity information to the data being transmitted, but in this case the receiver not only detects that an error has occurred, but calculates what information the transmitter is most likely to have transmitted. Majority of COFDM systems also use an interleaver (block or convolutional), which minimizes the burst errors within the data channel. The interleaved data is then passed through a serial-to-parallel converter, which maps the symbols onto an IQ constellation specific to the modulation scheme. Altera’s extensive suite of FEC cores include high-performance encoding and decoding for Reed-Solomon, convolutional, Viterbi, turbo codes, and interleaver.

Multi-carrier OFDM systems are considered superior to n-many independent subbands, each modulated by a single-carrier modulation technique. The constellation mapper takes symbols as inputs and maps them to appropriate constellation points as dictated by the modulation method specified. This process generates I and Q values, which are then filtered and sent to the IFFT (inverse fast fourier transform) for transformation. A buffer is required to store the I and Q values before they are sent to the IFFT.

FFT/IFFT is one of the fundamental building blocks of an OFDM system. The IFFT block provides a simple way to modulate data onto orthogonal subcarriers. The block of output samples from the IFFT make up a single OFDM symbol. After some additional processing, the time-domain signal that results from the IFFT is transmitted across the channel. At the receiver an FFT block is used to process the received signal and bring it into the frequency-domain. Ideally, the FFT output will be the original symbols that were sent to the IFFT at the transmitter. After the data is transformed via the IFFT function, the parallel-to-serial converter serializes the data for transmission to cyclic prefix.

A major problem in most wireless systems is the presence of a multipath channel. In a multipath environment, the transmitted signal reflects of several objects. As a result, multiple delayed versions of the transmitted signal arrive at the receiver. The multiple versions of the signal cause the received signal to be distorted. Many wired systems also have a similar problem where reflections occur due to impedance mismatches in the transmission line. In order to minimize the effects of multipath channel, a cyclic prefix is used before any filtering can take place. Cyclic prefix creates a guard band around individual OFDM symbols, which greatly minimizes the effects of multipath channel. Necessary in any wireless or wired digital communications design, digital filters help shape the signal. Altera's next-generation finite impulse response (FIR) compiler function allows a variety of different filters to be built, and supports variable coefficient filtering, as well as interpolation and decimation. Altera’s extensive suite of modulation/demodulation cores include constellation mapper/demapper, numerically controlled oscillator (NCO), FFT/IFFT, and FIR filter compiler.

OFDM technology is quickly becoming a popular method for advanced communication networks. Only time will tell if this technology will have a major impact on the next generation of wired and wireless communications systems. However one thing for sure is that each of the functional blocks of the OFDM transmitter/receiver can be mapped onto dedicated, parallel hardware resources of a PLD–avoiding the difficult programming and optimization challenges of scheduling time-critical operations through a single DSP device. Programmable logic when combined with a broad portfolio of easy-to-use, parameterizable, high-performance DSP IP cores, makes it even more compelling for designers to go down the path of programmable logic. These functions allow designers to focus more time and energy on improving and differentiating their system-level product, rather than redesigning common off-shelf functions.

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