Introduction

Higher mask cost and increasing minimum lot sizes, two economic trends of the semiconductor industry, are making FPGAs increasingly more cost effective compared to the competing ASIC solutions. As a result of these two trends, the market share of FPGAs and, along with it, the "value" of designs implemented in FPGAs continues to grow. As the FPGA design "value" increases, so does the need for "design security" in FPGAs. At the very least, the design community would like to duplicate in FPGAs the level of design security they had with ASIC technologies. This paper describes several distinct design security issues and concepts, the contrasts between the design security of competing FPGA technologies (SRAM, antifuse, and Flash) with the incumbent ASIC technology. A new business model enabled by the security capabilities of nonvolatile antifuse and Flash-based FPGAs will also be discussed.

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