Includes Hardwired 32-bit/33MHz PCI controllers, DMA controller, FIFOs, 200K Gate FPGA

SUNNYVALE, CA, NOVEMBER 4, 2002 - QuickLogic Corporation today announced the addition of its QL5632 to its QuickPCI family of secure, programmable master/target PCI (peripheral connect interface) bridge solutions. The QL5632 integrates hard-wired, 32-bit, 33MHz master and target PCI controllers with a configurable DMA controller, configurable FIFOs, and 200,000 gates of FPGA fabric that can be used to implement interfaces to external processors, ASICs, and FPGAs. QuickLogic is the only IC vendor to offer PCI bridge products with on-chip FPGAs.

This new device is ideal for applications that require the transfer of data between the PCI bus and high-throughput video compression/decompression, encryption/decryption, packet processing, DMA and other data processing sub-systems. Examples of such applications include: Edge routers that use multiple DMA engines for packet processing and block manipulation, T1/E1 channelizer cards that must transfer data from multiple HDLC channels to or from the PCI bus, and image processing applications in which a large FPGA or DSP may be used for video compression/decompression before sending the data to a hard drive or network.

On-chip FPGA Provides Short Design Cycle For Custom Interfaces - Historically designers of medium volume products who cannot afford the high NREs associated with masked ASICs have had two options for interfacing proprietary buses to the PCI bus:1) a multi-chip discrete solution using an ASSP and FPGA; or 2) a stand-alone FPGA with a soft intellectual property (IP) core for the PCI controller. While the multi-chip discrete solution avoids the timing problems and verification issues associated with using soft IP, this approach requires additional board space and increases system power consumption. On the other hand, a single-chip FPGA-based solution requires months of extra design time to develop and debug the PCI interface and resolve timing problems. In addition, the PCI bus initialization process must frequently be slowed down to allow enough time for an SRAM-based FPGA to be loaded and enumerated. If bus enumeration takes place before the FPGA is loaded, the PCI controller will not be operable. In any standard PCI plug-in card, bus initialization cannot be slowed because it is controlled by the system BIOS. In these cases, SRAM-based FPGA loading latency introduces the very serious risk of card inoperability.

QuickLogic's QL5632 offers the reliability, short design cycle and instant-on benefits of a fully verified, hardwired ASSP PCI controller with the flexibility of an FPGA in a high throughput single-chip solution.

Instant-on Feature Supports BIOS-Controlled Bus Enumeration - QuickLogic's QL5632 programmable PCI bridge IC maintains its configuration even when the system power is off. Since there is no loading latency during system power-up, the device is always enumerated by the PCI bus. This feature makes the QL5632 ideal for plug-in cards in systems in which the BIOS controls bus enumeration.

Absolute Design Security - QuickLogic's patented ViaLink FPGA configuration technology uses vias between the various metal layers for interconnect that provide 100% routability for the QL5632 FPGA fabric. ViaLink is a interconnect switch technology that supports field, programmability, high performance and low power consumption. Since there is no external configuration EEPROM, designs cannot be reverse engineered, which means they are secure from competition cloning or copying.

Wide Range of PCI Bridge Solutions - With the introduction of the QL5632, QuickLogic has six programmable PCI Bridge solutions, including master/target and target solutions for both 32-bit and 64-bit PCI buses with operating frequencies of 33, 66, and 75-MHz. FPGA densities range from 50K to 200K gates in a wide variety of packages.

In addition QuickLogic offers a variety of hot swappable PCI bridge ASSPs including 32-bit system master, bus master, bus target, and stand-alone target for 33 MHz and 50 MHz PCI busses, with internal bus speeds ranging from 33 MHz to 75 MHz.

Other Bridge Products - QuickLogic also offers a wide variety of ASSPs bridge products, including Gigabit Ethernet to PL3, Utopia to PL3, PL3 to PL3, Utopia to Utopia, TI DSP to PCI and CSIX to LVDS. Through its QuickASSP and QuickDR programs QuickLogic can provide "custom" ASSPs to meet virtually any bridging application.

QuickLogic is working hard to differentiate itself from Altera and Xilinx, the leading FPGA vendors. It is doing this by combining fixed application-specific functions with a programmable fabric. The company has already introduced product families with embedded interface functions, embedded DSP circuitry, and an embedded MIPS processor. The company calls these devices Embedded Standard Products (ESPs) and claims to have developed more than 100 ESP solutions. These include the ASSPs developed by V3 Semiconductor, which QuickLogic acquired in 2001.

Most of the company's ESP activities have been with its QuickPCI families of interface devices. QuickLogic was the first to integrate FPGA fabrics with different PCI functions. It is currently shipping one 64-bit/66 MHz device, the QL6054, and six 32-bit/33 MHz parts.

The QuickPCI devices compete with separate FPGA/ASSP chips and FPGAs from Altera and Xilinx with soft/firm PCI cores. The advantage of the soft/firm IP core approach is flexibility. Its disadvantages are the amount of silicon real estate required and the price of the IP core, which is typically around $5K for the simpler PCI cores. QuickPCI devices are certainly much less expensive that the use of an IP core and FPGA, at least for moderate quantities.

The market for PCI interfaces has been growing and is predicted to continue to grow at a 15% to 30% rate over the next several years. Most of the shipments are for the compact PCI format and for 32-bit/33 MHz systems. The markets for higher performance PCI interfaces are just now beginning to develop.