IBM First Foundry in the World to Receive Tape-Out on 90nm from Xilinx;

Next-Generation Xilinx FPGAs Planned for Volume Production Next Year

EAST FISHKILL, N.Y. and SAN JOSE, Calif., Dec. 16 -- IBM and Xilinx, Inc. today announced a major step toward production of what could be the world's first 90-nanometer (nm) chip. Using IBM's most advanced, copper-based 90nm semiconductor manufacturing process technology, the companies have taped out a new Xilinx field programmable gate array (FPGA) chip design for production in IBM's new 300mm chip fab. The new process technology has resulted in a 50 to 80 percent FPGA chip-size reduction compared to any competing FPGA solution. (90nm is less than 1/1,000th the width of a human hair, and 300mm wafers measure 12 inches. Product "tape out" refers to a key step in the manufacturing process when data required to manufacture a chip is sent to the foundry.)

IBM plans to manufacture the new product line in volume in the second half of 2003 at the company's state-of-the-art 300mm plant in East Fishkill, N.Y. The new IBM $2.5 billion 300mm chip-making facility combines -- for the first time anywhere -- IBM chip-making breakthroughs such as copper interconnects, silicon-on-insulator (SOI) and low-k dielectric insulation on 300mm wafers. The new facility began operation this year, and will be ramping up in capacity throughout 2003.

Xilinx's investment in 90nm manufacturing technology will enable the company to drive pricing down to under $25 for a one-million-gate FPGA (approximately 17,000 logic cells) which represents a savings of 35 to 70 percent compared to any competitive offering. Such a significant reduction in pricing is possible due to the remarkable economies of scale involved with moving to next-generation manufacturing processes at increasingly finer geometries to achieve greater device densities and higher yields.

"What we have just accomplished with Xilinx is testament to the fact that we have the most advanced semiconductor technology, chip design and manufacturing capabilities in the industry," said Michel Mayer, general manager, IBM Microelectronics Division. "Ultimately, this benefits our foundry customers because they leverage our expertise to get their high-performance chips to market as quickly and efficiently as possible."

Xilinx, one of the pioneers of the fabless semiconductor business model more than 18 years ago, continues to head the race to advanced manufacturing processes and has established an impressive track record of industry firsts - including first to 150nm in 2001 and first to 130nm in 2002. Currently, the company is also the highest volume purchaser of 300mm wafers globally.

"Our collaboration with IBM in developing leading edge manufacturing technologies is a vital component to our success as the market leader in programmable logic," said Wim Roelandts, Xilinx president and CEO. "Unlike other semiconductor companies -- fabless or otherwise -- we're moving aggressively toward 90nm to deliver even greater price/performance benefits to our customers, opening up entirely new markets for programmable logic."

IBM has used Xilinx's FPGAs to prove and test IBM's 130nm -- and now 90nm -- manufacturing processes. Due to the regular structure and re-programmability of Xilinx devices, defects can be more easily identified and isolated during manufacturing than with traditional, fixed semiconductor device architectures, making them an ideal process driver for a volume manufacturer such as IBM.

Milestone Achievement for IBM-Xilinx Collaboration
Today's news represents a milestone achievement for the manufacturing collaboration between IBM and Xilinx commenced in March of this year. The agreement marked the first time IBM would manufacture high-volume parts for a foundry customer using its most advanced processes, which are normally used in high-end microprocessors, custom chips and memory products. IBM is currently manufacturing Xilinx's flagship Virtex-II Pro semiconductor products using a 130nm process on 200mm wafers at IBM facilities in Burlington, VT. and on 300mm wafers at facilities in East Fishkill, N.Y.

Xilinx received its first 90 nm evaluation silicon from IBM several weeks ago and is set to supply 90 nm tapes to UMC, its other production source. The IBM and UMC 90 nm processes are said to be compatible.

Xilinx expects to deliver 90 nm samples during 1H03 and to be in production in the second half of the year. The company would not say whether these samples would be 90 nm versions of its Virtex-II Pro family or a new series of devices. Altera plans on delivering 90 nm samples during 2Q03.

Xilinx is producing its 130 nm Virtex-II Pro devices at both IBM and UMC. IBM is manufacturing the Virtex-II Pro using a 130nm process on 200mm wafers at its facilities in Burlington, Vt., and on 300mm wafers at its facilities in East Fishkill.

Xilinx says that it has accelerated its move to 300mm wafers at UMC for the 130 nm Virtex-II Pro FPGAs. The company predicts that 50% of its production will be on 300 mm wafers by the end of the next quarter and that it is the highest volume purchaser of 300mm wafers in the world.

Sampling of three Virtex-II Pro parts from IBM began in March 2002. However, yield problems related to the low-k dielectric and copper conductors have plagued production and Xilinx has not yet been able to release the family to distribution.

The benefits of moving to a 90 nm process from a 130 nm process can be substantial. Aside from a significant increase in speed, a density increase of more than a factor of two can be expected. Xilinx has stated that the new process has resulted in a 50-80% reduction in chip size. The company expects to drive pricing down to under $25 for a next-generation 17,000 logic-cell device as a result of the chip-size reduction and 300 mm wafers.

BUT . . . .

This scenario depends on Xilinx and IBM/UMC solving the yield problems at 130 nm and not encountering any new difficulties at 90 nm. Xilinx should be able to squeeze out a few 90 nm samples during 1Q03, as they expect, but it seems unlikely that the company will be in production at 90 nm with parts to their distributors during 2H03.

There are a number of known problems at 90 nm such as increased leakage currents and signal integrity effects. One of the more esoteric concerns is alpha particle or neutron induced soft errors in the SRAM arrays as the transistors become smaller. Actel has published a number of articles related to soft-error effects on its website. These errors could be especially bothersome to the configuration arrays of SRAM-based FPGAs. In addition, it is almost a certainty that some unexpected effects will appear and make life even more difficult.