Newest IP Core Continues Seven-Year Legacy of Complete PCI-Based Solutions From Xilinx and

Provides Customers with a Smooth Migration Path to 133MHz Designs

SAN JOSE, Calif., Jan. 27 - Xilinx, Inc., today announced that it is shipping a new IP core for use with its flagship Virtex-II FPGAs supporting the PCI-X interface operating at speeds up to 133MHz. The PCI-X based 133MHz core from Xilinx is the first FPGA-based IP core that supports the current PCI-X specification -- PCI-X 2.0 Mode 1, which can move data on a local bus in excess of 1 gigabyte per second.

Today's news underscores Xilinx's commitment to PCI technology. The company shipped its first PCI core in 1996 and since then, has sold more PCI cores than all its competitors combined. All Xilinx PCI cores -- including its PCI, PCI-X, and PCI Express solutions -- are developed in-house for Xilinx FPGAs to provide designers with pre-tested, fully verified solutions that reduce risk and system costs while accelerating product development.

The PCI-X technology-based 133MHz core is a 64-bit, parallel interface that leverages the widely deployed PCI-X technology to connect peripheral equipment to high-end servers and workstations. The new core also supports slower speed implementations of PCI-X architecture such as 100MHz and 66MHz, allowing designers to use the same core to support a variety of legacy bus speeds in an application. The core also supports the conventional PCI standard running at 33MHz. This flexibility allows a single Virtex FPGA to host both conventional PCI and PCI-X designs from a single bitstream.

"PCI-X architecture is an important and powerful technology because it builds upon previous generations of the PCI standard. It protects the investments made in PCI-based buses within computing systems and provides a solution for the higher bandwidth I/O needed in the marketplace," said Al Yanes, PCI-SIG President. "PCI-SIG is excited to see the successful introduction of new products based on the PCI-X 2.0 specification."

PCI-X technology is used in routers, hubs, and switches and a broad range of electronic equipment including industrial computers, digital and medical imaging systems, and embedded control and instrumentation systems.

According to the industry report, Advanced Bus and Interface Market Trends, 2nd Edition, published by Electronic Trend Publications, Inc. (August, 2002), the number of systems equipped with the PCI-X interface is expected to increase fivefold, from two million units in 2002, to 10 million in 2005. While PCI-X architecture supports several different data rates, most applications under development today target the specification's maximum speed of 133MHz.

"PCI-X interfaces running at 133MHz is an important performance milestone for the PCI-X standard," said Mark Aaldering, senior director of the Intellectual Property Division at Xilinx. "Its rapid adoption will drive dramatic increases in the use of PCI-X busses. In addition to the growth in PCI-X 133MHz design starts, we expect to see a vast migration to serial connectivity solutions, where the PCI Express solution from Xilinx will be extremely valuable. The PCI-X and PCI Express cores from Xilinx are helping designers bridge the gap between serial and parallel I/O technologies."

As part of its PCI technology-based solution, Xilinx offers an entire ecosystem of support including, reference designs, Xilinx Design Services, Xilinx XPERTs 3rd party design services, training, technical support via telephone and in the field, and a comprehensive suite of application notes to help ensure a designer's success. For complete information about Xilinx IP solutions, visit www.xilinx.com/ipcenter.

Price and Availability

Xilinx has been pursuing PCI applications for its FPGAs over the past seven years when it introduced its first PCI core. The company, over the years, has introduced cores for the various PCI flavors including ones for 64-bit/33 MHz and 32-bit/64 MHz, and one for 64-bit/66 MHz applications. It has shipped some 2000 PCI cores to date, with the majority being for the initial 32-bit/33 MHz version of PCI.

PCI has become the ubiquitous interconnection scheme for embedded systems. Emerging applications, especially in storage systems, for the standard has driven the need for additional bandwidth. PCI-X offers a doubling of the aggregate throughput rate to 1066 MBps when operated at 133 MHz.

Xilinx introduced its first PCI-X core near the end of 2000. This core ran at only 66 MHz when implemented in a Virtex-E device. It subsequently improved the core's performance to 100 MHz with the 0.15-micron Virtex-II family. Continuing development work and careful optimization of the HDL code has resulted in the latest release that can run at 133 MHz in a Virtex-II part. It expects to qualify the core for Virtex-II Pro by the end of this quarter.

One has to read the fine print to verify Xilinx's claim that it was the first PLD supplier to deliver a 133 MHz PCI-X core. Altera actually announced the availability of a 133 MHz PCI-X core for its Stratix devices in October 2002. The core was developed by PLDApplications, one of Altera's Megafunction Partners, and is claimed to support 32-bit or 64-bit modes, master and target functionality, 64-bit addressing, burst transfers, parameterizable configuration space, and up to 4 independent DMA channels with rotating priority. According to PLDApplications, the core is fully compliant with the PCI-X addendum to the PCI local bus specification, revision 1.0b. Xilinx claims that its core meets the current specification - PCI-X 2.0 Mode 1.

The PLDApplications core requires 3,500 logic elements, while the Xilinx core consumes 2646 LUTs and 1605 registers. Prices for a netlist-version of PLDApplications PCI-X core starts at $16,990, compared to $17,995 for the Xilinx core.