Company delivers 6700 logic cells, 500K bits of memory, PowerPC processor and four RocketIO serial transceivers for under $30*

SAN JOSE, Calif., January 27, 2003 - Based on its long-standing initiative to reduce cost through technology and deliver lower cost solutions to its customers, Xilinx, Inc. today announced new industry-leading price points for its Virtex-II Pro FPGA family. The company attributes these new price points to its aggressive move to 300 mm wafers and the smallest die size in its class, and represent reductions of up to 50 percent compared to 2002 price levels. Already the leading FPGA provider, today's price points place Xilinx clearly in the lead in offering the lowest cost programmable solutions in the industry.

Xilinx now offers the most powerful, lowest-cost integrated solutions in its class, and is the only programmable supplier to offer over 6,700 logic cells and 500K bits of embedded block memory plus an embedded PowerPC processor and four RocketIO serial transceivers for under $30*. With the new price points, Xilinx also offers 20,000 logic cells and 1.5M bits of embedded RAM with two PowerPCprocessors and eight RocketIO transceivers for under $100**.

"This move illustrates our focus on continuing to drive down costs for our customers while meeting their demand for superior devices. In today's economic times affordable solutions are the "watchword" for customers considering programmable logic as an alternative to the high cost of developing ASICs" said Rich Sevcik, senior vice president and general manager for FPGA Products at Xilinx. "This unprecedented price reduction will help us to further bridge the ASIC gap and is a result of our long term strategy to develop the most aggressive manufacturing processes in the industry."The new Virtex-II Pro FPGA pricing is the latest in a series of innovations where Xilinx has reduced cost through technology across the spectrum of solutions the company offers.

Smallest Die Size and 300 mm Wafers Lead to Lower Cost

Because of the overwhelming success of Virtex-II Pro FPGAs, Xilinx accelerated its move to 300mm wafer production with its fab partners. The larger 300mm wafers allow more chips per silicon wafer, significantly reducing production costs. Xilinx predicts that 50 percent of its production will be on 300 mm within the next quarter and is the highest volume purchaser of 300mm wafers in the world. In addition to the low cost advantages of larger wafers is Virtex-II Pro's smaller die size, a 35 percent smaller die size as compared to competitive products***. This die size advantage translates into more logic gates and memory for system designers with no additional cost. Virtex-II Pro EasyPath Solutions

Offer Additional Savings of up to 80 percent

In addition to reduced pricing on Virtex-II Pro, customers can take advantage of the Virtex-II Pro EasyPath solution, the industry's fastest, and no-risk cost-reduction migration path providing additional cost savings of up to 80 percent. Using the Virtex-II EasyPath family, designers of today 's complex systems can not only continue to build in Virtex-II Pro FPGAs as the critical element of their systems, but also take that flexibility into production with the Virtex-II Pro EasyPath solution. Spartan-IIE Low

Cost Solutions for High Volume Applications

For high volume applications requiring lower densities, Xilinx offers the world's lowest cost FPGA product line, the Spartan-IIE family. This family, the industry's most successful ASIC-alternative, targets new applications with up to 600K system gates and 514 I/O pins plus the lowest cost per pin of any competitive FPGA solution. With the recent expansion of the Spartan-IIE family, Xilinx is extending its lead in delivering high-I/O devices to FPGA and ASIC customers for low-cost applications such as set-top boxes, plasma displays, and broadcast video equipment. Design Time Savings with ISE tools

In addition to free web-based software, Xilinx delivers ASIC-strength design tools to exploit the power of Xilinx silicon. Widely regarded as the industry de facto design environment with over 150,000 users world wide, Xilinx ISE tools provide designers with the fastest compile times in the industry and design timesavings of up to 80 percent as compared to a traditional ASIC design environment, significantly reducing total system cost. Pricing and AvailabilityThe XC2VP4 is immediately available and volume priced below $30 at the end of 2004 (100,000 units). The XC2VP20 device is also immediately available with volume pricing below $100 at the end of 2004 (50,000 units).

Xilinx is making a special announcement about a trend that has characterized the PLD industry since its inception. FPGA users rely on these price reductions to meet pricing targets for their equipment.

FPGA producers have historically been able to reduce their prices at a 30% annual rate, especially for the first few years following a family's introduction. Much of this decrease results from the normal learning-curve experience that states that a product's price will continuously drop as the total volume produced increases. Production and yield improvements and modifications in the product's design all contribute to this effect.

Xilinx is stating that these announced price points will become effective some three years after the company began sampling Virtex-II Pro devices. It is, however, a little difficult to determine the basis for the 50% price reduction calculation. The company states that these projected production prices "represent reductions of up to 50% compared to 2002 price levels". Virtex-II Pro was not in production during 2002. With what are these 2004 projected high-volume production prices being compared?

Despite this little bit of smoke, Xilinx is making a serious effort to adopt techniques that will reduce the price of its devices. The learning curve effect does not occur without a good deal of effort. In fact, the slope of the learning curve depends on the effort extended.

Xilinx has made a very rapid transition to 300 mm wafers. A move that alone could eventually reduce product prices by 50%. The company expects that 50% of its devices will be produced on 300 mm wafers by the end of this quarter. All of the 300 mm production has been coming from UMC, Xilinx's high-volume foundry. It is expected that IBM will soon be moving Virtex-II Pro production to the larger wafers.

One interesting point is that, as a result of newer and better equipment, UMC is getting higher yields at 0.13 microns with the 300 mm wafers that it did with the 200 mm wafers. No mention was made concerning the actual yields being obtained.